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/openbsd-src/gnu/usr.bin/gcc/gcc/testsuite/gcc.c-torture/execute/
H A Dlshrdi-1.c9 static unsigned long long const zext[64] = { variable
79 static unsigned long long const zext[32] = { variable
209 unsigned long long y = variable_shift (zext[0], i); in main()
210 if (y != zext[i]) in main()
215 unsigned long long y = constant_shift (zext[0], i); in main()
216 if (y != zext[i]) in main()
H A Dashrdi-1.c9 static long long const zext[64] = { variable
146 static long long const zext[32] = { variable
311 long long y = variable_shift (zext[0], i); in main()
312 if (y != zext[i]) in main()
323 long long y = constant_shift (zext[0], i); in main()
324 if (y != zext[i]) in main()
/openbsd-src/gnu/usr.bin/binutils-2.17/cpu/
H A Dsh.cpu143 (and (raw-reg h-gr index) (zext DI #xFFFFFFFF)))
158 (zext DI (reg h-sr))
290 (sll DI (zext DI (subword SI (reg h-fr index) 0)) 32)
291 (zext DI (subword SI (reg h-fr (add index 1)) 0))) 0))
339 (or (sll (zext DI s1) 32)
340 (zext DI s0)))
344 (or (sll (zext DI h3) 48)
345 (or (sll (zext DI h2) 32)
346 (or (sll (zext DI h1) 16)
347 (zext DI h0)))))
[all …]
H A Dsh64-media.cpu214 (set rd (zext DI (add (subword SI rm 1) (subword SI rn 1)))))
393 (set rd (zext DI (c-call BI "sh64_fcmpeqd" drg drh))))
399 (set rd (zext DI (c-call BI "sh64_fcmpeqs" frg frh))))
405 (set rd (zext DI (c-call BI "sh64_fcmpged" drg drh))))
411 (set rd (zext DI (c-call BI "sh64_fcmpges" frg frh))))
417 (set rd (zext DI (c-call BI "sh64_fcmpgtd" drg drh))))
423 (set rd (zext DI (c-call BI "sh64_fcmpgts" frg frh))))
429 (set rd (zext DI (c-call BI "sh64_fcmpund" drg drh))))
435 (set rd (zext DI (c-call BI "sh64_fcmpuns" frg frh))))
767 (set rd (zext DI (mem QI (add rm (ext DI disp10))))))
[all …]
H A Dsh64-compact.cpu186 (set (newval) (set (raw-reg h-gr 19) (or (and (raw-reg h-gr 19) (inv DI 1)) (zext DI newval))))
366 (set r0 (and r0 (zext DI uimm8))))
544 (set rn (or (sll rn 1) (zext SI tbit)))
592 (set result (mul (zext DI rm) (zext DI rn)))
620 (set rn (zext SI (subword QI rm 3))))
626 (set rn (zext SI (subword HI rm 1))))
1022 (set tmpry (mul (zext DI x) (zext DI y)))
1023 (set mac (or DI (sll (zext DI mach) 32) (zext DI macl)))
1051 (set tmpry (mul (zext SI x) (zext SI y)))
1058 (set mac (or DI (sll (zext DI mach) 32) (zext DI macl)))
[all …]
H A Dcris.cpu32 (define-pmacro (SI-zext x) "How to zero-extend a dword to dword (a nop)" x)
33 (define-pmacro (HI-zext x) "How to zero-extend a word to dword" (zext SI x))
34 (define-pmacro (QI-zext x) "How to zero-extend a byte to dword" (zext SI x))
901 (zext SI (reg BI h-cbit))
903 (sll (zext SI (reg BI h-vbit)) 1)
905 (sll (zext SI (reg BI h-zbit)) 2)
907 (sll (zext SI (reg BI h-nbit)) 3)
909 (sll (zext SI (reg BI h-xbit)) 4)
911 (sll (zext SI (reg BI h-ibit)) 5)
913 (sll (zext SI (reg BI h-ubit)) 6)
[all …]
H A Diq2000.cpu515 (set rt-rs (and rt-rs (zext SI lo16)))
521 (set rt (and rs (zext SI lo16)))
563 (set rt-rs (or rt-rs (zext SI lo16)))
569 (set rt (or rs (zext SI lo16)))
768 (set rt-rs (xor rt-rs (zext SI lo16)))
774 (set rt (xor rs (zext SI lo16)))
973 (set rt (zext WI (mem QI (add base (ext SI (trunc HI lo16))))))
994 (set rt (zext WI (mem HI (add base (ext SI (trunc HI lo16))))))
/openbsd-src/gnu/llvm/llvm/include/llvm/Support/
H A DKnownBits.h159 return KnownBits(Zero.zext(BitWidth), One.zext(BitWidth)); in anyext()
163 KnownBits zext(unsigned BitWidth) const { in zext() function
165 APInt NewZero = Zero.zext(BitWidth); in zext()
167 return KnownBits(NewZero, One.zext(BitWidth)); in zext()
189 return zext(BitWidth); in zextOrTrunc()
/openbsd-src/gnu/llvm/llvm/lib/Analysis/
H A DREADME.txt13 …(-2 + (2 * (trunc i65 (((zext i64 (-2 + %n) to i65) * (zext i64 (-1 + %n) to i65)) /u 2) to i64)) …
H A DCmpInstAnalysis.cpp147 Mask = Mask.zext(X->getType()->getScalarSizeInBits()); in decomposeBitTestICmp()
/openbsd-src/gnu/llvm/llvm/lib/Support/
H A DAPFixedPoint.cpp244 ThisVal = ThisVal.zext(Wide); in mul()
245 OtherVal = OtherVal.zext(Wide); in mul()
304 ThisVal = ThisVal.zext(Wide); in div()
305 OtherVal = OtherVal.zext(Wide); in div()
356 ThisVal = ThisVal.zext(Wide); in shl()
407 APInt FractPart = Val.zextOrTrunc(Scale).zext(Width); in toString()
408 APInt FractPartMask = APInt::getAllOnes(Scale).zext(Width); in toString()
/openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrAtomics.td147 // i64 (zext (i8 (atomic_load_8))) gets legalized to
153 (i64 (zext (i32 (atomic_load_8 node:$addr))))>;
156 (i64 (zext (i32 (atomic_load_16 node:$addr))))>;
159 (i64 (zext (i32 (atomic_load_32 node:$addr))))>;
163 // results) and select a zext load; the next instruction will be sext_inreg
374 (zext (i32 (kind node:$addr, (i32 (trunc (i64 node:$val))))))>;
381 // 64-bit) and select a zext RMW; the next instruction will be sext_inreg which
499 (zext (i32 (assertzext (i32 (kind node:$addr,
505 (zext (i32 (kind node:$addr,
511 // zext RMW; the next instruction will be sext_inreg which is selected by
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstrExtension.td75 [(set GR32:$dst, (zext GR8:$src))]>, TB,
83 [(set GR32:$dst, (zext GR16:$src))]>, TB,
204 def : Pat<(i64 (zext GR8:$src)),
209 def : Pat<(i64 (zext GR16:$src)),
218 // to these explicit zext instructions.
219 def : Pat<(i64 (zext GR32:$src)),
/openbsd-src/gnu/llvm/llvm/lib/IR/
H A DConstantRange.cpp742 Min = Min.zext(ResultBitWidth); in castOp()
743 Max = Max.zext(ResultBitWidth); in castOp()
777 LowerExt = Lower.zext(DstTySize); in zeroExtend()
782 return ConstantRange(Lower.zext(DstTySize), Upper.zext(DstTySize)); in zeroExtend()
793 return ConstantRange(Lower.sext(DstTySize), Upper.zext(DstTySize)); in signExtend()
1099 APInt this_min = getUnsignedMin().zext(getBitWidth() * 2); in multiply()
1100 APInt this_max = getUnsignedMax().zext(getBitWidth() * 2); in multiply()
1101 APInt Other_min = Other.getUnsignedMin().zext(getBitWidth() * 2); in multiply()
1102 APInt Other_max = Other.getUnsignedMax().zext(getBitWidth() * 2); in multiply()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64InstrAtomics.td407 def : Pat<(stxr_1 (zext (and GPR32:$val, 0xff)), GPR64sp:$addr),
409 def : Pat<(stxr_2 (zext (and GPR32:$val, 0xffff)), GPR64sp:$addr),
411 def : Pat<(stxr_4 (zext GPR32:$val), GPR64sp:$addr),
461 def : Pat<(stlxr_1 (zext (and GPR32:$val, 0xff)), GPR64sp:$addr),
463 def : Pat<(stlxr_2 (zext (and GPR32:$val, 0xffff)), GPR64sp:$addr),
465 def : Pat<(stlxr_4 (zext GPR32:$val), GPR64sp:$addr),
/openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/
H A DREADME.txt14 1. Verify, how stuff is handling implicit zext with 8 bit operands (this might
/openbsd-src/gnu/llvm/clang/lib/StaticAnalyzer/Core/
H A DLoopUnrolling.cpp270 InitNum = InitNum.zext(BoundNum.getBitWidth()); in shouldCompletelyUnroll()
271 BoundNum = BoundNum.zext(InitNum.getBitWidth()); in shouldCompletelyUnroll()
/openbsd-src/gnu/llvm/llvm/docs/Frontend/
H A DPerformanceTips.rst78 Prefer zext over sext when legal
83 replace a sext with a zext when it can be proven safe, but if you have
85 be profitable to use a zext rather than a sext.
88 <range-metadata>` and LLVM can do the sext to zext conversion for you.
97 register width using a zext instruction.
/openbsd-src/gnu/llvm/llvm/lib/Target/M68k/
H A DM68kInstrData.td566 // i16 <- zext i8
567 def: Pat<(i16 (zext i8:$src)),
576 // i32 <- zext i8
577 def: Pat<(i32 (zext i8:$src)), (MOVZXd32d8 MxDRD8:$src)>;
582 // i32 <- zext i16
583 def: Pat<(i32 (zext i16:$src)), (MOVZXd32d16 MxDRD16:$src)>;
/openbsd-src/gnu/llvm/clang/lib/CodeGen/
H A DREADME.txt10 generates an zext/sext of x which can easily be avoided.
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonPatterns.td280 def Zext64: PatFrag<(ops node:$Rs), (i64 (zext node:$Rs))>;
283 def azext: PatFrags<(ops node:$Rs), [(zext node:$Rs), (anyext node:$Rs)]>;
823 def: Pat<(i32 (zext (i1 (seteq I32:$Rs, I32:$Rt)))),
825 def: Pat<(i32 (zext (i1 (setne I32:$Rs, I32:$Rt)))),
827 def: Pat<(i32 (zext (i1 (seteq I32:$Rs, anyimm:$s8)))),
829 def: Pat<(i32 (zext (i1 (setne I32:$Rs, anyimm:$s8)))),
2004 def: Pat<(i32 (zext (i1 (seteq (and (shl 1, I32:$Rt), I32:$Rs), 0)))),
2006 def: Pat<(i32 (zext (i1 (setne (and (shl 1, I32:$Rt), I32:$Rs), 0)))),
2008 def: Pat<(i32 (zext (i1 (seteq (and I32:$Rs, IsPow2_32:$u5), 0)))),
2010 def: Pat<(i32 (zext (i1 (setne (and I32:$Rs, IsPow2_32:$u5), 0)))),
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/M68k/Disassembler/
H A DM68kDisassembler.cpp125 Insn = Insn.zext(RoundUp); in getInstruction()
/openbsd-src/gnu/usr.bin/binutils/cpu/
H A Diq2000.cpu532 (set rt-rs (and rt-rs (zext SI lo16)))
538 (set rt (and rs (zext SI lo16)))
580 (set rt-rs (or rt-rs (zext SI lo16)))
586 (set rt (or rs (zext SI lo16)))
785 (set rt-rs (xor rt-rs (zext SI lo16)))
791 (set rt (xor rs (zext SI lo16)))
990 (set rt (zext WI (mem QI (add base (ext SI (trunc HI lo16))))))
1011 (set rt (zext WI (mem HI (add base (ext SI (trunc HI lo16))))))
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp464 Val = CI->getValue().zext(BitWidth); in ComputePHILiveOutRegInfo()
500 Val = CI->getValue().zext(BitWidth); in ComputePHILiveOutRegInfo()
/openbsd-src/gnu/llvm/llvm/docs/
H A DHowToUseAttributes.rst26 * Target-independent: ``noinline``, ``zext``

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