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Searched refs:od_enabled (Results 1 – 18 of 18) sorted by relevance

/openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dhwmgr.c106 hwmgr->od_enabled = false; in hwmgr_early_init()
111 hwmgr->od_enabled = false; in hwmgr_early_init()
126 hwmgr->od_enabled = false; in hwmgr_early_init()
181 hwmgr->od_enabled = false; in hwmgr_early_init()
463 hwmgr->od_enabled = true; in hwmgr_set_user_specify_caps()
H A Dsmu10_hwmgr.c591 hwmgr->od_enabled = 1; in smu10_hwmgr_backend_init()
1074 if (hwmgr->od_enabled) { in smu10_print_clock_levels()
1090 if (hwmgr->od_enabled) { in smu10_print_clock_levels()
1540 if (!hwmgr->od_enabled) { in smu10_set_fine_grain_clk_vol()
H A Dvega10_hwmgr.c1626 if (hwmgr->od_enabled) in vega10_populate_single_gfx_level()
1691 if (hwmgr->od_enabled) { in vega10_populate_single_soc_level()
1794 if (hwmgr->od_enabled) in vega10_populate_vddc_soc_levels()
1830 if (hwmgr->od_enabled) in vega10_populate_single_memory_level()
2581 if (hwmgr->od_enabled) { in vega10_init_smc_table()
3494 if (hwmgr->od_enabled && data->need_update_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()
3500 if (hwmgr->od_enabled && data->need_update_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in vega10_trim_single_dpm_states()
4780 if (!hwmgr->od_enabled) in vega10_emit_clock_levels()
4791 if (!hwmgr->od_enabled) in vega10_print_clock_levels()
4802 if (!hwmgr->od_enabled) in vega10_print_clock_levels()
[all...]
H A Dsmu7_hwmgr.c1077 if (hwmgr->od_enabled) { in smu7_setup_default_dpm_tables()
4257 if (hwmgr->od_enabled && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()
4264 if (hwmgr->od_enabled && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()
4301 if ((!hwmgr->od_enabled || force_trim) in smu7_trim_single_dpm_states()
5020 if (hwmgr->od_enabled) { in smu7_print_clock_levels()
5029 if (hwmgr->od_enabled) { in smu7_print_clock_levels()
5038 if (hwmgr->od_enabled) { in smu7_print_clock_levels()
5501 if (!hwmgr->od_enabled) { in smu7_odn_edit_dpm_table()
H A Dvega20_hwmgr.c1135 hwmgr->od_enabled = false; in vega20_od8_set_feature_id()
/openbsd-src/sys/dev/pci/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c1364 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()
1372 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()
1379 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()
1404 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()
1567 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()
1576 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()
1584 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()
1609 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()
2377 if (smu->od_enabled &&
2589 if (!smu->od_enabled) { in navi10_od_edit_dpm_table()
[all...]
H A Dsienna_cichlid_ppt.c639 if (smu->od_enabled) { in sienna_cichlid_get_power_limit()
1358 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels()
1369 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels()
1380 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels()
1397 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels()
2239 if (!smu->od_enabled) { in sienna_cichlid_od_edit_dpm_table()
H A Darcturus_ppt.c1355 if (smu->od_enabled) { in arcturus_get_power_limit()
/openbsd-src/sys/dev/pci/drm/amd/pm/swsmu/
H A Damdgpu_smu.c582 smu->od_enabled = true; in smu_set_funcs()
622 smu->od_enabled = false; in smu_set_funcs()
627 smu->od_enabled = true; in smu_set_funcs()
636 smu->od_enabled = true; in smu_set_funcs()
752 if (!amdgpu_sriov_vf(adev) || smu->od_enabled) { in smu_late_init()
/openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/
H A Damd_powerplay.c985 if (hwmgr->od_enabled) { in pp_set_power_limit()
1020 if (hwmgr->od_enabled) { in pp_get_power_limit()
/openbsd-src/sys/dev/pci/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_7_ppt.c355 smu->od_enabled = false; in smu_v13_0_7_check_powerplay_table()
363 smu->od_enabled = false; in smu_v13_0_7_check_powerplay_table()
1968 if (smu->od_enabled) { in smu_v13_0_7_get_power_limit()
H A Dsmu_v13_0_0_ppt.c370 smu->od_enabled = false; in smu_v13_0_0_check_powerplay_table()
378 smu->od_enabled = false; in smu_v13_0_0_check_powerplay_table()
2012 if (smu->od_enabled) { in smu_v13_0_0_get_power_limit()
/openbsd-src/sys/dev/pci/drm/amd/pm/
H A Damdgpu_dpm.c1468 return (smu->od_enabled || smu->is_apu); in amdgpu_dpm_is_overdrive_supported()
1481 return hwmgr->od_enabled; in amdgpu_dpm_is_overdrive_supported()
/openbsd-src/sys/dev/pci/drm/amd/pm/swsmu/inc/
H A Damdgpu_smu.h497 bool od_enabled; member
/openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/inc/
H A Dhwmgr.h803 bool od_enabled; member
/openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c949 if (hwmgr->od_enabled) in fiji_populate_single_graphic_level()
1171 if (hwmgr->od_enabled) in fiji_populate_single_memory_level()
H A Dpolaris10_smumgr.c969 if (hwmgr->od_enabled) in polaris10_populate_single_graphic_level()
1164 if (hwmgr->od_enabled) in polaris10_populate_single_memory_level()
H A Dtonga_smumgr.c629 if (hwmgr->od_enabled) in tonga_populate_single_graphic_level()
977 if (hwmgr->od_enabled) in tonga_populate_single_memory_level()