| /openbsd-src/gnu/llvm/llvm/lib/Target/Xtensa/ |
| H A D | XtensaInstrInfo.td | 139 def EXTUI : RRR_Inst<0x00, 0x04, 0x00, (outs AR:$r), (ins AR:$t, uimm5:$imm1, imm1_16:$imm2), 140 "extui\t$r, $t, $imm1, $imm2", []> { 142 bits<4> imm2; 146 let Inst{23-20} = imm2;
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrFormats.td | 145 (ins GPR:$rx, operand:$imm2), 146 !strconcat(op, "\t$rx, $imm2"), pattern> { 148 bits<2> imm2; 152 let Inst{1 - 0} = imm2;
|
| H A D | CSKYInstrInfo.td | 1014 def TRAP32 : CSKY32Inst<AddrModeNone, 0x30, (outs), (ins uimm2:$imm2), "trap32 ${imm2}", []> { 1015 bits<2> imm2; 1020 let Inst{11 - 10} = imm2;
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrFormats.td | 78 bits<2> imm2; 84 let Inst{16-15} = imm2;
|
| H A D | LoongArchInstrInfo.td | 391 : Fmt3RI2<op, (outs GPR:$rd), (ins GPR:$rj, GPR:$rk, ImmOpnd:$imm2), opstr, 392 "$rd, $rj, $rk, $imm2">; 913 def : Pat<(add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)), 914 (ALSL_W GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>; 917 def : Pat<(add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)), 918 (ALSL_D GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>; 919 def : Pat<(loongarch_bstrpick (add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)), 921 (ALSL_WU GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
|
| /openbsd-src/sys/arch/amd64/amd64/ |
| H A D | db_disasm.c | 1138 int imm2; in db_disasm() 1474 get_value_inc(imm2, loc, 2, 0); /* segment */ 1475 db_printf("$0x%#x", imm2); 1107 int imm2; db_disasm() local
|
| /openbsd-src/sys/arch/i386/i386/ |
| H A D | db_disasm.c | 1104 int imm2; in db_disasm() local 1388 get_value_inc(imm2, loc, 2, 0); /* segment */ in db_disasm() 1390 imm2, DB_FORMAT_N, 1, 0)); in db_disasm()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | Mips32r6InstrFormats.td | 508 bits<2> imm2; 517 let Inst{7-6} = imm2;
|
| H A D | MicroMips32r6InstrFormats.td | 362 bits<2> imm2; 370 let Inst{10-9} = imm2;
|
| H A D | Mips32r6InstrInfo.td | 750 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2); 751 string AsmString = !strconcat(instr_asm, "\t$rd, $rs, $rt, $imm2");
|
| H A D | MicroMips32r6InstrInfo.td | 555 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2); 556 string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $rd, $imm2");
|
| H A D | MipsFastISel.cpp | 232 unsigned Op0, uint64_t imm1, uint64_t imm2, in fastEmitInst_riir() argument
|
| /openbsd-src/sys/netinet/ |
| H A D | ip_carp.c | 1938 struct in6_multi_mship *imm, *imm2; in carp_join_multicast6() 1962 if ((imm2 = in6_joingroup(&sc->sc_if, in carp_ioctl() 1973 if (imm2) in carp_ioctl() 1974 LIST_INSERT_HEAD(&im6o->im6o_memberships, imm2, in carp_ioctl() 1916 struct in6_multi_mship *imm, *imm2; carp_join_multicast6() local
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | SMEInstrFormats.td | 1948 def : InstAlias<mnemonic # "\t$ZAda[$Rv, $imm2], $Zn, $Zm", 1949 …n>(NAME #_S) MatrixOp32:$ZAda, MatrixIndexGPR32Op8_11:$Rv, uimm2s2range:$imm2, ZZ_h_mul_r:$Zn, ZZ… 1985 def : InstAlias<mnemonic # "\t$ZAda[$Rv, $imm2], $Zn, $Zm", 1986 …n>(NAME #_S) MatrixOp32:$ZAda, MatrixIndexGPR32Op8_11:$Rv, uimm2s2range:$imm2, ZZZZ_h_mul_r:$Zn, … 2496 …(ins MatrixOp32:$_ZAda, MatrixIndexGPR32Op8_11:$Rv, uimm2s4range:$imm2, ZPR8:$Zn, ZPR4b8:$Zm, Vect… 2497 mnemonic, "\t$ZAda[$Rv, $imm2], $Zn, $Zm$i", 2503 bits<2> imm2; 2511 let Inst{1-0} = imm2; 2520 …(ins MatrixOp64:$_ZAda, MatrixIndexGPR32Op8_11:$Rv, uimm2s4range:$imm2, ZPR16:$Zn, ZPR4b16:$Zm, Ve… 2521 mnemonic, "\t$ZAda[$Rv, $imm2], $Zn, $Zm$i", [all …]
|
| H A D | SVEInstrFormats.td | 8817 bits<2> imm2;
|
| /openbsd-src/gnu/usr.bin/binutils-2.17/cpu/ |
| H A D | m32c.cpu | 7061 ;<insn>.size #imm1,#imm2,dst -- for m32c 7063 (define-pmacro (insn-imm1-imm2-dst-defn src1 src2 dstgroup xmode wstr op encoding sem) 7074 (define-pmacro (insn32-imm1-imm2-dst-Prefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 … 7076 …(insn-imm1-imm2-dst-defn (.sym Imm-48- xmode) (.sym Imm- base4 - xmode) 24-24-Prefixed xmode wstr … 7080 …(insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base3 - xmode) 24-16-Prefixed xmode wstr … 7084 …(insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base2 - xmode) 24-8-Prefixed xmode wstr op 7088 …(insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base1 - xmode) basic-Prefixed xmode wstr … 7096 (define-pmacro (insn32-imm1-imm2-dst-Unprefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc… 7098 …(insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base4 - xmode) 16-24-Unprefixed xmode wst… 7102 …(insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base3 - xmode) 16-16-Unprefixed xmode wst… [all …]
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 1582 MCOperand imm2(MCOperand::createExpr(Expr)); // lower 32 in processInstruction() local 1583 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, imm, imm2); in processInstruction()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb2.td | 343 // t2addrmode_so_reg := reg + (reg << imm2) 763 let Inst{7-6} = 0b00; // imm2 849 let Inst{7-6} = 0b00; // imm2 1006 let Inst{7-6} = 0b00; // imm2 1048 let Inst{7-6} = 0b00; // imm2 1147 let Inst{7-6} = 0b00; // imm2 1890 let Inst{5-4} = addr{1-0}; // imm2 2908 let Inst{7-6} = 0b00; // imm2 3425 let Inst{7-6} = 0b00; // imm2
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | README-SSE.txt | 467 INSERTPS can match any insert (extract, imm1), imm2 for 4 x float, and insert
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrFormats.td | 3179 ImmOpWithPattern imm1, ImmOpWithPattern imm2> 3180 : InstIE<opcode, (outs), (ins imm1:$I1, imm2:$I2),
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXIntrinsics.td | 1490 def imm2 : NVPTXInst<(outs regclass:$dst),
|