| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1491 CondCode getSetCCInverse(CondCode Operation, EVT Type);
1505 CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike);
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 838 ISD::CondCode InverseCC = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
878 ISD::CondCode CCInv = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
904 CCOpcode = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
1873 LHSCC = ISD::getSetCCInverse(LHSCC, LHS.getOperand(0).getValueType()); in PerformDAGCombine()
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| H A D | AMDGPUISelLowering.cpp | 3763 getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), LHS.getValueType()); in performSelectCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 415 CCCode = getSetCCInverse(CCCode, RetVT); in softenSetCCOperands()
428 CCCode = getSetCCInverse(CCCode, RetVT); in softenSetCCOperands()
3786 Cond = ISD::getSetCCInverse(Cond, OpVT); in foldSetCCWithAnd()
3876 NewCond = getSetCCInverse(NewCond, XVT); in optimizeSetCCOfSignedTruncationCheck()
4078 ISD::CondCode InvCond = ISD::getSetCCInverse(Cond, CTVT); in simplifySetCCWithCTPOP()
4377 ISD::CondCode InvCond = ISD::getSetCCInverse( in SimplifySetCC()
4536 CC = ISD::getSetCCInverse(CC, N0.getOperand(0).getValueType()); in SimplifySetCC()
10405 InvCC = getSetCCInverse(CCCode, OpVT); in LegalizeSetCCCondCode()
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| H A D | SelectionDAG.cpp | 557 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, EVT Type) { in getSetCCInverse() function in ISD
561 ISD::CondCode ISD::GlobalISel::getSetCCInverse(ISD::CondCode Op, in getSetCCInverse() function in ISD::GlobalISel
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| H A D | LegalizeDAG.cpp | 3746 ISD::CondCode InvCC = ISD::getSetCCInverse(CCOp, Tmp1.getValueType()); in ExpandNode()
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| H A D | DAGCombiner.cpp | 8735 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR()
11403 SatCC = ISD::getSetCCInverse(SatCC, VT.getScalarType()); in visitVSELECT()
11450 SatCC = ISD::getSetCCInverse(SatCC, VT.getScalarType()); in visitVSELECT()
25624 CC = ISD::getSetCCInverse(CC, CmpOpVT); in SimplifySelectCC()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2816 CC = getSetCCInverse(CC, VT0); in combineSelect()
2880 CC = getSetCCInverse(CC, LHSVT); in combineSelectCC()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4678 TargetCC = DAG.getCondCode(ISD::getSetCCInverse(CCVal, LHS.getValueType())); in lowerSELECT()
8487 CCVal = ISD::getSetCCInverse(CCVal, SetCCOpVT); in combineSubOfBoolean()
9914 CCVal = ISD::getSetCCInverse(CCVal, SetCCOpVT); in tryDemorganOfBooleanCondition()
9962 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in combine_CC()
10006 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in combine_CC()
10014 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in combine_CC()
10310 DAG.getSetCC(DL, VT, LHS, RHS, ISD::getSetCCInverse(CCVal, VT)); in PerformDAGCombine()
10318 DAG.getSetCC(DL, VT, LHS, RHS, ISD::getSetCCInverse(CCVal, VT)); in PerformDAGCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2996 changeFPCCToAArch64CC(getSetCCInverse(CC, /* FP inverse */ MVT::f32), in changeVectorFPCCToAArch64CC()
3271 CC = getSetCCInverse(CC, LHS.getValueType()); in emitConjunctionRec()
3706 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerXOR()
8905 LHS, RHS, ISD::getSetCCInverse(CC, LHS.getValueType()), CCVal, DAG, dl); in LowerSETCC()
8930 changeFPCCToAArch64CC(ISD::getSetCCInverse(CC, LHS.getValueType()), CC1, in LowerSETCC()
8976 ISD::CondCode CondInv = ISD::getSetCCInverse(Cond, VT); in LowerSETCCCARRY()
9036 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
9040 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
9047 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
9055 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 694 ISD::getSetCCInverse(CC, SetCC.getValueType())); in performSELECTCombine()
729 ISD::getSetCCInverse(CC, SetCC.getValueType())); in performSELECTCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1987 ISD::CondCode NewCC = ISD::GlobalISel::getSetCCInverse(CC, true); in LowerSETCC()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 5451 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
5461 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
5470 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
5512 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
18030 CC = ISD::getSetCCInverse(CC, /* Integer inverse */ MVT::i32); in PerformHWLoopCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 3875 CC = ISD::getSetCCInverse(CC, InputVT); in getSETCCInGPR()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2957 CC = ISD::getSetCCInverse(CC, Mode == CmpMode::Int ? MVT::i32 : MVT::f32); in getVectorComparisonOrInvert()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 45410 ISD::CondCode NewCC = ISD::getSetCCInverse( in combineVSelectWithAllOnesOrZeros()
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