| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | LiveStacks.cpp | 81 OS << " [" << TRI->getRegClassName(RC) << "]\n"; in print()
|
| H A D | RegisterBank.cpp | 108 OS << LS << TRI->getRegClassName(&RC); in print()
|
| H A D | RegAllocBase.cpp | 106 << TRI->getRegClassName(MRI->getRegClass(VirtReg->reg())) in allocatePhysRegs()
|
| H A D | RegisterClassInfo.cpp | 191 dbgs() << "AllocationOrder(" << TRI->getRegClassName(RC) << ") = ["; in compute()
|
| H A D | VirtRegMap.cpp | 152 << TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n"; in print()
160 << "] " << TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n"; in print()
|
| H A D | MachineVerifier.cpp | 2117 << TRI->getRegClassName(DRC) << " register.\n"; in visitMachineOperand()
2201 << TRI->getRegClassName( in visitMachineOperand()
2214 errs() << "Register class " << TRI->getRegClassName(RC) in visitMachineOperand()
2220 errs() << "Register class " << TRI->getRegClassName(RC) in visitMachineOperand()
2243 errs() << "Expected a " << TRI->getRegClassName(DRC) in visitMachineOperand()
2244 << " register, but got a " << TRI->getRegClassName(RC) in visitMachineOperand()
|
| H A D | ExecutionDomainFix.cpp | 423 << TRI->getRegClassName(RC) << " **********\n"); in runOnMachineFunction()
|
| H A D | LiveRangeEdit.cpp | 502 << TRI->getRegClassName(MRI.getRegClass(LI.reg())) << '\n'; in calculateRegClassAndHint()
|
| H A D | TargetRegisterInfo.cpp | 179 OS << StringRef(TRI->getRegClassName(RegInfo.getRegClass(Reg))).lower(); in printRegClassOrBank()
|
| H A D | RegisterScavenging.cpp | 505 TRI->getRegClassName(&RC) + in spill()
|
| H A D | RegAllocPBQP.cpp | 894 const char *RegClassName = TRI->getRegClassName(MRI.getRegClass(VReg)); in PrintNodeInfo()
|
| H A D | AggressiveAntiDepBreaker.cpp | 532 LLVM_DEBUG(dbgs() << " " << TRI->getRegClassName(RC)); in GetRenameRegisters()
|
| H A D | TargetInstrInfo.cpp | 1519 OS << ':' << TRI->getRegClassName(TRI->getRegClass(RCID)); in createMIROperandComment()
|
| H A D | RegAllocFast.cpp | 766 << " in class " << TRI->getRegClassName(&RC) in allocVirtReg()
|
| H A D | InlineSpiller.cpp | 1226 << TRI.getRegClassName(MRI.getRegClass(edit.getReg())) in spill()
|
| H A D | RegisterCoalescer.cpp | 2019 << TRI->getRegClassName(CP.getNewRC()) << " with "; in joinCopy()
4177 << TRI->getRegClassName(MRI->getRegClass(Reg)) << '\n'); in runOnMachineFunction()
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 784 const char *getRegClassName(const TargetRegisterClass *Class) const { in getRegClassName() function
785 return MCRegisterInfo::getRegClassName(Class->MC); in getRegClassName()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.h | 108 const char* getRegClassName(unsigned RegClassID) const;
|
| H A D | AMDGPUDisassembler.cpp | 1084 const char* AMDGPUDisassembler::getRegClassName(unsigned RegClassID) const { in getRegClassName() function in AMDGPUDisassembler
1086 getRegClassName(&AMDGPUMCRegisterClasses[RegClassID]); in getRegClassName()
1109 return errOperand(Val, Twine(getRegClassName(RegClassID)) + in createRegOperand()
1155 *CommentStream << "Warning: " << getRegClassName(SRegClassID) in createSRegOperand()
|
| /openbsd-src/gnu/llvm/llvm/tools/llvm-exegesis/lib/ |
| H A D | MCInstrDescView.cpp | 271 << RegInfo.getRegClassName( in dump()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.cpp | 111 dbgs() << "Register class: " << getRegClassName(RC) << "\n"; in getCallerSavedRegs()
|
| H A D | HexagonBitTracker.cpp | 108 << TRI.getRegClassName(&RC) << '\n'; in mask()
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 548 const char *getRegClassName(const MCRegisterClass *Class) const { in getRegClassName() function
|
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIRParser.cpp | 682 TRI->getRegClassName(Info.D.RC) + "' for virtual register " + in setupRegisterInfo()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 679 O << "/*Invalid register, operand has \'" << MRI.getRegClassName(&RC) in printRegularOperand()
|