| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kRegisterInfo.cpp | 154 if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister())) in getReservedRegs()
159 setBitVector(getBaseRegister()); in getReservedRegs()
185 BasePtr = (FIndex < 0 ? FramePtr : getBaseRegister()); in eliminateFrameIndex()
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| H A D | M68kRegisterInfo.h | 109 unsigned getBaseRegister() const { return BasePtr; } in getBaseRegister() function
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| H A D | M68kFrameLowering.cpp | 84 FrameReg = TRI->getBaseRegister(); in getFrameIndexReference()
490 unsigned BasePtr = TRI->getBaseRegister(); in emitPrologue()
800 SavedRegs.set(TRI->getBaseRegister()); in determineCalleeSaves()
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| H A D | M68kCollapseMOVEMPass.cpp | 222 Reg == TRI->getBaseRegister() || in ProcessMI()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/ |
| H A D | LanaiRegisterInfo.cpp | 60 Reserved.set(getBaseRegister()); in getReservedRegs()
156 FrameReg = getBaseRegister(); in eliminateFrameIndex()
262 Register LanaiRegisterInfo::getBaseRegister() const { return Lanai::R14; } in getBaseRegister() function in LanaiRegisterInfo
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| H A D | LanaiRegisterInfo.h | 44 Register getBaseRegister() const;
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| H A D | LanaiFrameLowering.cpp | 214 SavedRegs.reset(LRI->getBaseRegister()); in determineCalleeSaves()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.h | 151 Register getBaseRegister() const { return BasePtr; } in getBaseRegister() function
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| H A D | X86SelectionDAGInfo.cpp | 44 return llvm::is_contained(ClobberSet, TRI->getBaseRegister()); in isBaseRegConflictPossible()
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| H A D | X86RegisterInfo.cpp | 565 if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister())) in getReservedRegs()
570 Register BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); in getReservedRegs()
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| H A D | X86FrameLowering.cpp | 1527 Register BasePtr = TRI->getBaseRegister(); in emitPrologue()
2471 FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getBaseRegister(); in getFrameIndexReference()
2930 Register BasePtr = TRI->getBaseRegister(); in determineCalleeSaves()
3662 Register BasePtr = TRI->getBaseRegister(); in restoreWin32EHStackPointers()
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| H A D | X86ISelLowering.cpp | 27834 Reg = RegInfo->getBaseRegister(); in LowerINTRINSIC_WO_CHAIN()
36671 Register BasePtr = RegInfo->getBaseRegister(); in emitEHSjLjSetJmp()
37092 Register BP = RI.getBaseRegister(); in EmitSjLjDispatchBlock()
37515 assert(TRI->getBaseRegister() == X86::ESI && in EmitInstrWithCustomInserter()
37550 Register BasePtr = TRI->getBaseRegister(); in EmitInstrWithCustomInserter()
37581 Register BasePtr = TRI->getBaseRegister(); in EmitInstrWithCustomInserter()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.h | 126 unsigned getBaseRegister() const;
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| H A D | AArch64RegisterInfo.cpp | 494 unsigned AArch64RegisterInfo::getBaseRegister() const { return AArch64::X19; } in getBaseRegister() function in AArch64RegisterInfo
964 return getBaseRegister(); in getLocalAddressRegister()
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| H A D | AArch64FrameLowering.cpp | 1834 TII->copyPhysReg(MBB, MBBI, DL, RegInfo->getBaseRegister(), AArch64::SP, in emitPrologue()
2396 FrameReg = RegInfo->hasBasePointer(MF) ? RegInfo->getBaseRegister() in resolveFrameOffsetReference()
2414 FrameReg = RegInfo->getBaseRegister(); in resolveFrameOffsetReference()
2988 ? RegInfo->getBaseRegister() in determineCalleeSaves()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 209 Register getBaseRegister() const { return BasePtr; } in getBaseRegister() function
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| H A D | ARMFrameLowering.cpp | 1256 BuildMI(MBB, MBBI, dl, TII.get(ARM::MOVr), RegInfo->getBaseRegister()) in emitPrologue()
1261 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), RegInfo->getBaseRegister()) in emitPrologue()
1468 FrameReg = RegInfo->getBaseRegister(); in ResolveFrameIndexReference()
1516 FrameReg = RegInfo->getBaseRegister(); in ResolveFrameIndexReference()
2331 SavedRegs.set(RegInfo->getBaseRegister()); in determineCalleeSaves()
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| H A D | Thumb1FrameLowering.cpp | 170 Register BasePtr = RegInfo->getBaseRegister(); in emitPrologue()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.h | 172 Register getBaseRegister(const MachineFunction &MF) const;
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| H A D | PPCFrameLowering.cpp | 393 unsigned BPReg = HasBP ? (unsigned) RegInfo->getBaseRegister(MF) : FPReg; in replaceFPWithRealFP()
652 Register BPReg = RegInfo->getBaseRegister(MF); in emitPrologue()
1265 Register BPReg = RegInfo->getBaseRegister(MF); in inlineStackProbe()
1574 Register BPReg = RegInfo->getBaseRegister(MF); in emitEpilogue()
2029 SavedRegs.reset(RegInfo->getBaseRegister(MF)); in determineCalleeSaves()
2194 Register BP = RegInfo->getBaseRegister(MF); in processFunctionBeforeFrameFinalized()
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| H A D | PPCRegisterInfo.cpp | 1672 FrameIndex < 0 ? getBaseRegister(MF) : getFrameRegister(MF), false); in eliminateFrameIndex()
1824 Register PPCRegisterInfo::getBaseRegister(const MachineFunction &MF) const { in getBaseRegister() function in PPCRegisterInfo
1894 return !isFrameOffsetLegal(MI, getBaseRegister(MF), Offset); in needsFrameBaseReg()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.h | 100 Register getBaseRegister() const;
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| H A D | SIFrameLowering.cpp | 1079 TRI.hasBasePointer(MF) ? TRI.getBaseRegister() : Register(); in emitPrologue()
1484 Register BasePtrReg = TRI->getBaseRegister(); in determinePrologEpilogSGPRSaves()
1602 Register BasePtrReg = RI->getBaseRegister(); in assignCalleeSavedSpillSlots()
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| H A D | SIRegisterInfo.cpp | 511 Register SIRegisterInfo::getBaseRegister() const { return AMDGPU::SGPR34; } in getBaseRegister() function in SIRegisterInfo
644 MCRegister BasePtrReg = getBaseRegister(); in getReservedRegs()
1682 ? getBaseRegister() in buildVGPRSpillLoadStore()
2030 ? getBaseRegister() in eliminateFrameIndex()
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