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Searched refs:buildAnyExt (Results 1 – 10 of 10) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp374 Val = MIRBuilder.buildAnyExt(s32, Val).getReg(0); in legalizeCustom()
376 Val = MIRBuilder.buildAnyExt(s64, Val).getReg(0); in legalizeCustom()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUPostLegalizerCombiner.cpp287 CvtSrc = B.buildAnyExt(S32, CvtSrc).getReg(0); in applyCvtF32UByteN()
H A DAMDGPUCallLowering.cpp39 return Handler.MIRBuilder.buildAnyExt(LLT::scalar(32), ValVReg).getReg(0); in extendRegisterMin32()
H A DAMDGPULegalizerInfo.cpp3008 Tmp = B.buildAnyExt(S64, LocalAccum[0]).getReg(0); in buildMultiply()
4312 WideRegs.push_back(B.buildAnyExt(S32, Unmerge.getReg(I)).getReg(0)); in handleD16VData()
4370 Register AnyExt = B.buildAnyExt(LLT::scalar(32), VData).getReg(0); in fixStoreSourceType()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp262 Src = MIRBuilder.buildAnyExt(LLT::scalar(DstSize), Src).getReg(0); in buildAnyextOrCopy()
H A DCallLowering.cpp504 B.buildAnyExt(DstRegs[i], UnmergeToEltTy.getReg(i)); in buildCopyToRegs()
1166 auto MIB = MIRBuilder.buildAnyExt(LocTy, ValReg); in extendRegister()
H A DLegalizerHelper.cpp930 MIRBuilder.buildAnyExt(DstReg, ImplicitReg); in narrowScalar()
1049 MIRBuilder.buildAnyExt(DstReg, TmpReg); in narrowScalar()
1659 SrcReg = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0); in widenScalarUnmergeValues()
1688 WideSrc = MIRBuilder.buildAnyExt(LCMTy, WideSrc).getReg(0); in widenScalarUnmergeValues()
1794 Src = MIRBuilder.buildAnyExt(WideTy, Src); in widenScalarExtract()
1950 auto LHS = MIRBuilder.buildAnyExt(WideTy, MI.getOperand(1)); in widenScalarAddSubShlSat()
1952 : MIRBuilder.buildAnyExt(WideTy, MI.getOperand(2)); in widenScalarAddSubShlSat()
3098 SrcReg = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0); in lowerStore()
5378 MIRBuilder.buildAnyExt(SrcReg, SrcRegs[I]); in narrowScalarInsert()
H A DMachineIRBuilder.cpp452 MachineInstrBuilder MachineIRBuilder::buildAnyExt(const DstOp &Res, in buildAnyExt() function in MachineIRBuilder
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/
H A DAArch64LegalizerInfo.cpp1083 Register ZExtValueReg = MIB.buildAnyExt(LLT::scalar(64), Value).getReg(0); in legalizeIntrinsic()
1528 MIRBuilder.buildAnyExt(LLT::scalar(64), Value).getReg(0); in legalizeMemOps()
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h641 MachineInstrBuilder buildAnyExt(const DstOp &Res, const SrcOp &Op);