Home
last modified time | relevance | path

Searched refs:Sub2 (Results 1 – 7 of 7) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DExpandLargeFpConvert.cpp374 Value *Sub2 = Builder.CreateSub(Builder.getIntN(BitWidthNew, BitWidth - 1), in expandIToFP() local
377 Sub2, Builder.getIntN(BitWidthNew, FPMantissaWidth + 1)); in expandIToFP()
435 ExtractT64 = Builder.CreateTrunc(Sub2, Builder.getInt64Ty()); in expandIToFP()
469 ExtractT66 = Builder.CreateTrunc(Sub2, Builder.getIntNTy(64)); in expandIToFP()
492 E0->addIncoming(Sub2, SwEpilog); in expandIToFP()
493 E0->addIncoming(Sub2, IfElse); in expandIToFP()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonHardwareLoops.cpp1544 unsigned Sub2 = DI->getOperand(2).getImm(); in checkForImmediate() local
1546 if (Sub2 == Hexagon::isub_lo && Sub4 == Hexagon::isub_hi) in checkForImmediate()
1548 else if (Sub2 == Hexagon::isub_hi && Sub4 == Hexagon::isub_lo) in checkForImmediate()
H A DHexagonBitSimplify.cpp466 unsigned Sub1 = I.getOperand(2).getImm(), Sub2 = I.getOperand(4).getImm(); in parseRegSequence() local
472 assert((Sub1 == SubLo && Sub2 == SubHi) || (Sub1 == SubHi && Sub2 == SubLo)); in parseRegSequence()
473 if (Sub1 == SubLo && Sub2 == SubHi) { in parseRegSequence()
478 if (Sub1 == SubHi && Sub2 == SubLo) { in parseRegSequence()
H A DHexagonConstPropagation.cpp1952 unsigned Sub2 = MI.getOperand(4).getImm(); in evaluate() local
1958 if (Sub2 != SubLo && Sub2 != SubHi) in evaluate()
1960 assert(Sub1 != Sub2); in evaluate()
/openbsd-src/gnu/llvm/llvm/utils/TableGen/
H A DCodeGenRegisters.cpp1408 const CodeGenSubRegIndex *Sub2) { in computeComposites() argument
1411 const RegMap &Img2 = SubRegAction.at(Sub2); in computeComposites()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp3581 auto Sub2 = B.buildMergeLikeInstr(S64, {Sub2_Lo, Sub2_Hi}); in legalizeUnsignedDIV_REM64Impl() local
3613 S64, B.buildICmp(CmpInst::ICMP_NE, S1, C6, Zero32), Sub3, Sub2); in legalizeUnsignedDIV_REM64Impl()
H A DAMDGPUISelLowering.cpp1935 SDValue Sub2 = DAG.getBitcast(VT, in LowerUDIVREM64() local
1964 SDValue Sel2 = DAG.getSelectCC(DL, C6, Zero, Sub3, Sub2, ISD::SETNE); in LowerUDIVREM64()