Searched refs:ShiftedVal (Results 1 – 5 of 5) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 184 int64_t ShiftedVal = Val >> TrailingZeros; in generateInstSeq() local
190 isInt<6>(ShiftedVal) && !ActiveFeatures[RISCV::TuneLUIADDIFusion]; in generateInstSeq()
192 generateInstSeqImpl(ShiftedVal, ActiveFeatures, TmpSeq); in generateInstSeq()
206 uint64_t ShiftedVal = (uint64_t)Val << LeadingZeros; in generateInstSeq() local
210 ShiftedVal |= maskTrailingOnes<uint64_t>(LeadingZeros); in generateInstSeq()
213 generateInstSeqImpl(ShiftedVal, ActiveFeatures, TmpSeq); in generateInstSeq()
221 ShiftedVal &= maskTrailingZeros<uint64_t>(LeadingZeros); in generateInstSeq()
223 generateInstSeqImpl(ShiftedVal, ActiveFeatures, TmpSeq); in generateInstSeq()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 215 auto ShiftedVal = B.buildShl(Ty, LHS, Shift); in matchAArch64MulConstCombine() local
217 Register AddSubLHS = ShiftValUseIsLHS ? ShiftedVal.getReg(0) : LHS; in matchAArch64MulConstCombine()
218 Register AddSubRHS = ShiftValUseIsLHS ? LHS : ShiftedVal.getReg(0); in matchAArch64MulConstCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4151 auto CanShrinkImmediate = [&](int64_t &ShiftedVal) { in tryShrinkShlLogicImm() argument
4155 ShiftedVal = (uint64_t)Val >> ShAmt; in tryShrinkShlLogicImm()
4156 if (NVT == MVT::i64 && !isUInt<32>(Val) && isUInt<32>(ShiftedVal)) in tryShrinkShlLogicImm()
4159 if (ShiftedVal == UINT8_MAX || ShiftedVal == UINT16_MAX) in tryShrinkShlLogicImm()
4162 ShiftedVal = Val >> ShAmt; in tryShrinkShlLogicImm()
4163 if ((!isInt<8>(Val) && isInt<8>(ShiftedVal)) || in tryShrinkShlLogicImm()
4164 (!isInt<32>(Val) && isInt<32>(ShiftedVal))) in tryShrinkShlLogicImm()
4168 ShiftedVal = (uint64_t)Val >> ShAmt; in tryShrinkShlLogicImm()
4169 if (NVT == MVT::i64 && !isUInt<32>(Val) && isUInt<32>(ShiftedVal)) in tryShrinkShlLogicImm()
4175 int64_t ShiftedVal; in tryShrinkShlLogicImm() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 999 if (auto ShiftedVal = getShiftedVal<12>()) in isAddSubImm() local
1000 return ShiftedVal->first >= 0 && ShiftedVal->first <= 0xfff; in isAddSubImm()
1012 if (auto ShiftedVal = getShiftedVal<12>()) in isAddSubImmNeg() local
1013 return ShiftedVal->first < 0 && -ShiftedVal->first <= 0xfff; in isAddSubImmNeg()
1859 if (auto ShiftedVal = getShiftedVal<Shift>()) { in addImmWithOptionalShiftOperands() local
1860 Inst.addOperand(MCOperand::createImm(ShiftedVal->first)); in addImmWithOptionalShiftOperands()
1861 Inst.addOperand(MCOperand::createImm(ShiftedVal->second)); in addImmWithOptionalShiftOperands()
1874 if (auto ShiftedVal = getShiftedVal<Shift>()) { in addImmNegWithOptionalShiftOperands() local
1875 Inst.addOperand(MCOperand::createImm(-ShiftedVal->first)); in addImmNegWithOptionalShiftOperands()
1876 Inst.addOperand(MCOperand::createImm(ShiftedVal->second)); in addImmNegWithOptionalShiftOperands()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 648 int64_t ShiftedVal = Val >> ShAmt; in tryShrinkShlLogicImm() local
649 if (!isInt<12>(ShiftedVal)) in tryShrinkShlLogicImm()
669 CurDAG->getTargetConstant(ShiftedVal, DL, VT)); in tryShrinkShlLogicImm()
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