| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 924 MVT ShiftVT = in getShiftAmountTy() local
928 if (ShiftVT.getSizeInBits() < Log2_32_Ceil(LHSTy.getSizeInBits())) in getShiftAmountTy()
929 ShiftVT = MVT::i32; in getShiftAmountTy()
930 assert(ShiftVT.getSizeInBits() >= Log2_32_Ceil(LHSTy.getSizeInBits()) && in getShiftAmountTy()
932 return ShiftVT; in getShiftAmountTy()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4057 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMUL() local
4058 SDValue Trunc = DAG.getZExtOrTrunc(LogBase2, DL, ShiftVT); in visitMUL()
4580 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitUDIVLike() local
4581 SDValue Trunc = DAG.getZExtOrTrunc(LogBase2, DL, ShiftVT); in visitUDIVLike()
4822 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMULHU() local
4823 SDValue Trunc = DAG.getZExtOrTrunc(SRLAmt, DL, ShiftVT); in visitMULHU()
5715 EVT ShiftVT = TLI.getShiftAmountTy(HalfVT, DAG.getDataLayout()); in visitANDLike() local
5720 SDValue ShiftK = DAG.getConstant(ShiftBits, SL, ShiftVT); in visitANDLike()
7430 EVT ShiftVT = OppShift.getOperand(1).getValueType(); in extractShiftForRotate() local
7432 SDValue NewShiftNode = DAG.getConstant(NeededShiftAmt, DL, ShiftVT); in extractShiftForRotate()
[all …]
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| H A D | LegalizeDAG.cpp | 1632 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local
1636 ShiftVT = MagVT; in ExpandFCOPYSIGN()
1639 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN()
1640 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
1642 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN()
1643 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
2421 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local
2422 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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| H A D | TargetLowering.cpp | 1688 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local
1711 SDValue NewSA = TLO.DAG.getConstant(Diff, dl, ShiftVT); in SimplifyDemandedBits()
1750 TLO.DAG.getConstant(ShAmt - InnerShAmt, dl, ShiftVT); in SimplifyDemandedBits()
1823 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local
1851 SDValue NewSA = TLO.DAG.getConstant(Diff, dl, ShiftVT); in SimplifyDemandedBits()
1890 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local
1949 SDValue NewSA = TLO.DAG.getConstant(BitWidth - 1 - Log2, dl, ShiftVT); in SimplifyDemandedBits()
4015 EVT ShiftVT = getShiftAmountTy(OpVT, DAG.getDataLayout(), in foldSetCCWithBinOp() local
4017 SDValue One = DAG.getConstant(1, DL, ShiftVT); in foldSetCCWithBinOp()
7906 EVT ShiftVT = getShiftAmountTy(SrcVT, DAG.getDataLayout()); in expandUINT_TO_FP() local
[all …]
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| H A D | SelectionDAG.cpp | 1643 EVT ShiftVT = TLI->getShiftAmountTy(VT, getDataLayout(), LegalTypes); in getShiftAmountConstant() local
1644 return getConstant(Val, DL, ShiftVT); in getShiftAmountConstant()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 11686 MVT ShiftVT = ResVT; in LowerCONCAT_VECTORSvXi1() local
11688 ShiftVT = Subtarget.hasDQI() ? MVT::v8i1 : MVT::v16i1; in LowerCONCAT_VECTORSvXi1()
11692 SubVec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ShiftVT, in LowerCONCAT_VECTORSvXi1()
11693 DAG.getUNDEF(ShiftVT), SubVec, in LowerCONCAT_VECTORSvXi1()
11695 Op = DAG.getNode(X86ISD::KSHIFTL, dl, ShiftVT, SubVec, in LowerCONCAT_VECTORSvXi1()
13958 static int matchShuffleAsShift(MVT &ShiftVT, unsigned &Opcode, in matchShuffleAsShift() argument
13995 ShiftVT = ByteShift ? MVT::getVectorVT(MVT::i8, SizeInBits / 8) in matchShuffleAsShift()
14028 MVT ShiftVT; in lowerShuffleAsShift() local
14033 int ShiftAmt = matchShuffleAsShift(ShiftVT, Opcode, VT.getScalarSizeInBits(), in lowerShuffleAsShift()
14038 ShiftAmt = matchShuffleAsShift(ShiftVT, Opcode, VT.getScalarSizeInBits(), in lowerShuffleAsShift()
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 6256 EVT ShiftVT = N0.getOperand(1).getValueType(); in combineSIGN_EXTEND() local
6261 ShiftVT)); in combineSIGN_EXTEND()
6263 DAG.getConstant(NewSraAmt, SDLoc(N0), ShiftVT)); in combineSIGN_EXTEND()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6617 EVT ShiftVT = N->getOperand(1).getValueType(); in LowerShift() local
6619 ISD::SUB, dl, ShiftVT, getZeroVector(ShiftVT, DAG, dl), N->getOperand(1)); in LowerShift()
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