| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 872 ARM_AM::ShiftOpc ShiftTy; member
882 ARM_AM::ShiftOpc ShiftTy; member
889 ARM_AM::ShiftOpc ShiftTy; member
1459 return isPostIdxRegShifted() && PostIdxReg.ShiftTy == ARM_AM::no_shift; in isPostIdxReg()
2563 ARM_AM::getSORegOpc(RegShiftedReg.ShiftTy, RegShiftedReg.ShiftImm))); in addRegShiftedRegOperands()
2574 ARM_AM::getSORegOpc(RegShiftedImm.ShiftTy, Imm))); in addRegShiftedImmOperands()
3315 PostIdxReg.ShiftTy); in addPostIdxRegShiftedOperands()
3653 Op->RegShiftedReg.ShiftTy = ShTy; in CreateShiftedRegister()
3666 Op->RegShiftedImm.ShiftTy = ShTy; in CreateShiftedImmediate()
3831 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, in CreatePostIdxReg() argument
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 787 EVT ShiftTy, SelectionDAG &DAG) { in genConstMult() argument
799 DAG.getConstant(C.logBase2(), DL, ShiftTy)); in genConstMult()
810 SDValue Op0 = genConstMult(X, Floor, DL, VT, ShiftTy, DAG); in genConstMult()
811 SDValue Op1 = genConstMult(X, C - Floor, DL, VT, ShiftTy, DAG); in genConstMult()
817 SDValue Op0 = genConstMult(X, Ceil, DL, VT, ShiftTy, DAG); in genConstMult()
818 SDValue Op1 = genConstMult(X, Ceil - C, DL, VT, ShiftTy, DAG); in genConstMult()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 181 bool SelectShift(const Instruction *I, ARM_AM::ShiftOpc ShiftTy);
2771 ARM_AM::ShiftOpc ShiftTy) { in SelectShift() argument
2814 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, ShiftImm)); in SelectShift()
2817 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, 0)); in SelectShift()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1640 LLT ShiftTy = MRI.getType(MI.getOperand(0).getReg()); in applyCombineMulToShl() local
1641 auto ShiftCst = MIB.buildConstant(ShiftTy, ShiftVal); in applyCombineMulToShl()
2269 static LLT getMidVTForTruncRightShiftCombine(LLT ShiftTy, LLT TruncTy) { in getMidVTForTruncRightShiftCombine() argument
2270 const unsigned ShiftSize = ShiftTy.getScalarSizeInBits(); in getMidVTForTruncRightShiftCombine()
2275 return ShiftTy.changeElementSize(32); in getMidVTForTruncRightShiftCombine()
2283 return ShiftTy; in getMidVTForTruncRightShiftCombine()
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| H A D | LegalizerHelper.cpp | 1792 LLT ShiftTy = SrcTy; in widenScalarExtract() local
1795 ShiftTy = WideTy; in widenScalarExtract()
1799 ShiftTy, Src, MIRBuilder.buildConstant(ShiftTy, Offset)); in widenScalarExtract()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 4841 EVT ShiftTy = in SimplifySetCC() local
4850 DAG.getConstant(ShCt, dl, ShiftTy))); in SimplifySetCC()
4860 DAG.getConstant(ShCt, dl, ShiftTy))); in SimplifySetCC()
4868 EVT ShiftTy = getShiftAmountTy(ShValTy, Layout, !DCI.isBeforeLegalize()); in SimplifySetCC() local
4879 DAG.getConstant(ShiftBits, dl, ShiftTy)); in SimplifySetCC()
4907 DAG.getConstant(ShiftBits, dl, ShiftTy)); in SimplifySetCC()
9741 EVT ShiftTy = getShiftAmountTy(VT, DAG.getDataLayout()); in expandFixedPointMul() local
9743 DAG.getConstant(Scale, dl, ShiftTy)); in expandFixedPointMul()
9771 DAG.getConstant(VTSize - 1, dl, ShiftTy)); in expandFixedPointMul()
9838 EVT ShiftTy = getShiftAmountTy(VT, DAG.getDataLayout()); in expandFixedPointDiv() local
[all …]
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| H A D | SelectionDAGBuilder.cpp | 3215 EVT ShiftTy = DAG.getTargetLoweringInfo().getShiftAmountTy( in visitShift() local
3220 if (!I.getType()->isVectorTy() && Op2.getValueType() != ShiftTy) { in visitShift()
3221 assert(ShiftTy.getSizeInBits() >= Log2_32_Ceil(Op1.getValueSizeInBits()) && in visitShift()
3223 Op2 = DAG.getZExtOrTrunc(Op2, getCurSDLoc(), ShiftTy); in visitShift()
5514 EVT ShiftTy = TLI.getShiftAmountTy(PromVT, DAG.getDataLayout()); in expandDivFix() local
5519 DAG.getConstant(1, DL, ShiftTy)); in expandDivFix()
5523 DAG.getConstant(1, DL, ShiftTy)); in expandDivFix()
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| H A D | LegalizeIntegerTypes.cpp | 4310 EVT ShiftTy = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in ExpandIntRes_Shift() local
4311 if (ShiftOp.getValueType() != ShiftTy) in ExpandIntRes_Shift()
4312 ShiftOp = DAG.getZExtOrTrunc(ShiftOp, dl, ShiftTy); in ExpandIntRes_Shift()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 3036 const LLT ShiftTy = MRI.getType(ShiftReg); in select() local
3039 ShiftTy.getSizeInBits() == 64) { in select()
3040 assert(!ShiftTy.isVector() && "unexpected vector shift ty"); in select()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 5164 auto *ShiftTy = FixedVectorType::get( in getArithmeticReductionCost() local
5167 Instruction::LShr, ShiftTy, CostKind, in getArithmeticReductionCost()
5463 auto *ShiftTy = FixedVectorType::get( in getMinMaxReductionCost() local
5466 Instruction::LShr, ShiftTy, TTI::TCK_RecipThroughput, in getMinMaxReductionCost()
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| H A D | X86ISelLowering.cpp | 49863 EVT ShiftTy = Shift.getValueType(); in foldXorTruncShiftIntoCmp() local
49864 if (ShiftTy != MVT::i16 && ShiftTy != MVT::i32 && ShiftTy != MVT::i64) in foldXorTruncShiftIntoCmp()
49869 Shift.getConstantOperandAPInt(1) != (ShiftTy.getSizeInBits() - 1)) in foldXorTruncShiftIntoCmp()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64SVEInstrInfo.td | 1631 …multiclass adrShiftPat<ValueType Ty, ValueType PredTy, ValueType ShiftTy, Instruction DestAdrIns, …
1635 (Ty (splat_vector (ShiftTy ShiftAmt)))))),
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