Searched refs:SVEDataVector (Results 1 – 2 of 2) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 71 SVEDataVector, enumerator
1250 RK = RegKind::SVEDataVector; in isSVEVectorReg()
1293 if (Kind != k_Register || Reg.Kind != RegKind::SVEDataVector) in isSVEDataVectorRegOfWidth()
2193 assert((Kind == RegKind::NeonVector || Kind == RegKind::SVEDataVector || in CreateVectorReg()
2617 case RegKind::SVEDataVector: in parseVectorKind()
2859 return Kind == RegKind::SVEDataVector ? RegNum : 0; in matchRegisterNameAlias()
2908 case RegKind::SVEDataVector: in getNumRegsForRegKind()
7163 RegisterKind = RegKind::SVEDataVector; in parseDirectiveReq()
7165 tryParseVectorRegister(RegNum, Kind, RegKind::SVEDataVector); in parseDirectiveReq()
7791 tryParseVectorRegister(RegNum, Kind, RegKind::SVEDataVector); in tryParseSVEDataVector()
[all …]
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.td | 1148 let ParserMethod = "tryParseVectorList<RegKind::SVEDataVector>";
1150 "isTypedVectorList<RegKind::SVEDataVector, " #NumRegs #", 0, " #ElementWidth #">";
1247 "isTypedVectorListMultiple<RegKind::SVEDataVector, " # NumRegs # ", 0, "
1348 let PredicateMethod = "isTypedVectorListStrided<RegKind::SVEDataVector, "
|