Searched refs:RegOpc (Results 1 – 3 of 3) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/AsmParser/ |
| H A D | WebAssemblyAsmTypeCheck.cpp | 329 auto RegOpc = WebAssembly::getRegisterOpcode(Opc); in typeCheck() local
330 assert(RegOpc != -1 && "Failed to get register version of MC instruction"); in typeCheck()
331 const auto &II = MII.get(RegOpc); in typeCheck()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86InstrCompiler.td | 703 // RegOpc corresponds to the mr version of the instruction
707 multiclass LOCK_ArithBinOp<bits<8> RegOpc, bits<8> ImmOpc, bits<8> ImmOpc8,
712 def NAME#8mr : I<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
713 RegOpc{3}, RegOpc{2}, RegOpc{1}, 0 },
719 def NAME#16mr : I<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
720 RegOpc{3}, RegOpc{2}, RegOpc{1}, 1 },
727 def NAME#32mr : I<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
728 RegOpc{3}, RegOpc{2}, RegOpc{1}, 1 },
735 def NAME#64mr : RI<{RegOpc{7}, RegOpc{6}, RegOpc{5}, RegOpc{4},
736 RegOpc{3}, RegOpc{2}, RegOpc{1}, 1 },
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 1613 unsigned RegOpc = getDirectRegReplacement(ExtOpc); in replaceInstrExact() local
1615 if (RegOpc == TargetOpcode::REG_SEQUENCE) { in replaceInstrExact()
1617 BuildMI(MBB, At, dl, HII->get(RegOpc)) in replaceInstrExact()
1624 BuildMI(MBB, At, dl, HII->get(RegOpc)) in replaceInstrExact()
1646 if (RegOpc != 0) { in replaceInstrExact()
1647 MachineInstrBuilder MIB = BuildMI(MBB, At, dl, HII->get(RegOpc)); in replaceInstrExact()
1669 unsigned RegOpc, Shift; in replaceInstrExact() local
1672 RegOpc = HII->changeAddrMode_io_rr(ExtOpc); in replaceInstrExact()
1677 RegOpc = HII->changeAddrMode_ur_rr(ExtOpc); in replaceInstrExact()
1683 if (RegOpc == -1u) { in replaceInstrExact()
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