Searched refs:NextReg (Results 1 – 6 of 6) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1790 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local 1795 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1801 .addReg(NextReg) in emitAlignedDPRCS2Spills() 1804 NextReg += 4; in emitAlignedDPRCS2Spills() 1810 unsigned R4BaseReg = NextReg; in emitAlignedDPRCS2Spills() 1814 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1820 .addReg(NextReg) in emitAlignedDPRCS2Spills() 1823 NextReg += 4; in emitAlignedDPRCS2Spills() 1829 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() 1837 NextReg += 2; in emitAlignedDPRCS2Spills() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 1210 unsigned NextReg = SrcReg; in getSrcVReg() local 1213 NextReg = getIncomingRegForBlock(Inst, BB1); in getSrcVReg() 1218 NextReg = Inst->getOperand(1).getReg(); in getSrcVReg() 1219 if (NextReg == SrcReg || !Register::isVirtualRegister(NextReg)) in getSrcVReg() 1221 SrcReg = NextReg; in getSrcVReg()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 2584 Register NextReg = CSI[i + RegInc].getReg(); in computeCalleeSaveRegisterPairs() local 2588 if (AArch64::GPR64RegClass.contains(NextReg) && in computeCalleeSaveRegisterPairs() 2589 !invalidateRegisterPairing(RPI.Reg1, NextReg, IsWindows, in computeCalleeSaveRegisterPairs() 2592 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs() 2595 if (AArch64::FPR64RegClass.contains(NextReg) && in computeCalleeSaveRegisterPairs() 2596 !invalidateWindowsRegisterPairing(RPI.Reg1, NextReg, NeedsWinCFI, in computeCalleeSaveRegisterPairs() 2598 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs() 2601 if (AArch64::FPR128RegClass.contains(NextReg)) in computeCalleeSaveRegisterPairs() 2602 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1412 Register NextReg = MI->getOperand(1).getReg(); in getTestBitReg() local 1414 if (!NextReg.isValid() || !MRI.hasOneNonDBGUse(NextReg)) in getTestBitReg() 1418 Reg = NextReg; in getTestBitReg() 1466 Register NextReg; in getTestBitReg() local 1474 NextReg = TestReg; in getTestBitReg() 1480 NextReg = TestReg; in getTestBitReg() 1487 NextReg = TestReg; in getTestBitReg() 1495 NextReg = TestReg; in getTestBitReg() 1510 NextReg = TestReg; in getTestBitReg() 1515 if (!NextReg.isValid()) in getTestBitReg() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2778 unsigned NextReg, NextRegNum, NextRegWidth; in ParseRegList() local 2781 if (!ParseAMDGPURegister(NextRegKind, NextReg, in ParseRegList() 2794 if (!AddNextRegisterToList(Reg, RegWidth, RegKind, NextReg, Loc)) in ParseRegList()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 6186 int NextReg = nextReg(((MipsOperand &)*Operands[1]).getGPR32Reg()); in ConvertXWPOperands() local 6187 Inst.addOperand(MCOperand::createReg(NextReg)); in ConvertXWPOperands()
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