| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 4798 static SDValue adjustLoadValueTypeImpl(SDValue Result, EVT LoadVT, in adjustLoadValueTypeImpl() argument
4801 if (!LoadVT.isVector()) in adjustLoadValueTypeImpl()
4807 EVT FittingLoadVT = LoadVT; in adjustLoadValueTypeImpl()
4808 if ((LoadVT.getVectorNumElements() % 2) == 1) { in adjustLoadValueTypeImpl()
4810 EVT::getVectorVT(*DAG.getContext(), LoadVT.getVectorElementType(), in adjustLoadValueTypeImpl()
4811 LoadVT.getVectorNumElements() + 1); in adjustLoadValueTypeImpl()
4826 if ((LoadVT.getVectorNumElements() % 2) == 1) in adjustLoadValueTypeImpl()
4847 EVT LoadVT = M->getValueType(0); in adjustLoadValueType() local
4849 EVT EquivLoadVT = LoadVT; in adjustLoadValueType()
4850 if (LoadVT.isVector()) { in adjustLoadValueType()
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| H A D | SIISelLowering.h | 254 SDValue handleByteShortBufferLoads(SelectionDAG &DAG, EVT LoadVT, SDLoc DL,
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 2220 EVT LoadVT, EVT BitcastVT, const SelectionDAG &DAG, in isLoadBitCastBeneficial() argument
2224 if (LoadVT.isFixedLengthVector() && BitcastVT.isFixedLengthVector() && in isLoadBitCastBeneficial()
2230 if (!LoadVT.isSimple() || !BitcastVT.isSimple()) in isLoadBitCastBeneficial()
2233 MVT LoadMVT = LoadVT.getSimpleVT(); in isLoadBitCastBeneficial()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | StatepointLowering.cpp | 1267 auto LoadVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), in visitGCRelocate() local
1271 DAG.getLoad(LoadVT, getCurSDLoc(), Chain, SpillSlot, LoadMMO); in visitGCRelocate()
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| H A D | SelectionDAGBuilder.cpp | 8020 static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT, in getMemCmpLoad() argument
8027 Type::getIntNTy(PtrVal->getContext(), LoadVT.getScalarSizeInBits()); in getMemCmpLoad()
8028 if (LoadVT.isVector()) in getMemCmpLoad()
8029 LoadTy = FixedVectorType::get(LoadTy, LoadVT.getVectorNumElements()); in getMemCmpLoad()
8056 Builder.DAG.getLoad(LoadVT, Builder.getCurSDLoc(), Root, Ptr, in getMemCmpLoad()
8134 MVT LoadVT; in visitMemCmpBCmpCall() local
8140 LoadVT = MVT::i16; in visitMemCmpBCmpCall()
8143 LoadVT = MVT::i32; in visitMemCmpBCmpCall()
8148 LoadVT = hasFastLoadsAndCompare(NumBitsToCompare); in visitMemCmpBCmpCall()
8152 if (LoadVT == MVT::INVALID_SIMPLE_VALUE_TYPE) in visitMemCmpBCmpCall()
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| H A D | LegalizeDAG.cpp | 882 EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT()); in LegalizeLoadOps() local
884 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT)) { in LegalizeLoadOps()
888 (LoadVT == SrcVT) ? ISD::NON_EXTLOAD : ExtType; in LegalizeLoadOps()
890 SDValue Load = DAG.getExtLoad(MidExtType, dl, LoadVT, Chain, Ptr, in LegalizeLoadOps()
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| H A D | TargetLowering.cpp | 8893 EVT LoadVT = EVT::getIntegerVT(*DAG.getContext(), NumLoadBits); in scalarizeVectorLoad() local
8900 APInt::getLowBitsSet(NumLoadBits, SrcEltBits), SL, LoadVT); in scalarizeVectorLoad()
8905 DAG.getExtLoad(ISD::EXTLOAD, SL, LoadVT, Chain, BasePTR, in scalarizeVectorLoad()
8915 LoadVT, SL, /*LegalTypes=*/false); in scalarizeVectorLoad()
8916 SDValue ShiftedElt = DAG.getNode(ISD::SRL, SL, LoadVT, Load, ShiftAmount); in scalarizeVectorLoad()
8918 DAG.getNode(ISD::AND, SL, LoadVT, ShiftedElt, SrcEltBitMask); in scalarizeVectorLoad()
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| H A D | DAGCombiner.cpp | 6299 EVT LoadVT = MLoad->getMemoryVT(); in visitAND() local
6301 if (TLI.isLoadExtLegal(ISD::ZEXTLOAD, ExtVT, LoadVT)) { in visitAND()
6306 LoadVT.getVectorElementType().getScalarSizeInBits(); in visitAND()
6311 LoadVT, MLoad->getMemOperand(), MLoad->getAddressingMode(), in visitAND()
18729 EVT LoadVT; in getStoreMergeCandidates() local
18733 LoadVT = Ld->getMemoryVT(); in getStoreMergeCandidates()
18735 if (MemVT != LoadVT) in getStoreMergeCandidates()
18767 if (LoadVT != OtherLd->getMemoryVT()) in getStoreMergeCandidates()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 577 virtual bool isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT,
2793 EVT LoadVT = getValueType(DL, Load->getType()); in isExtLoad() local
2797 if (!Load->hasOneUse() && (isTypeLegal(LoadVT) || !isTypeLegal(VT)) && in isExtLoad()
2810 return isLoadExtLegal(LType, VT, LoadVT); in isExtLoad()
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| H A D | BasicTTIImpl.h | 1042 EVT LoadVT = EVT::getEVT(Src);
1046 TLI->isLoadExtLegal(LType, ExtVT, LoadVT))
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| /openbsd-src/gnu/llvm/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2733 EVT LoadVT = EltVT; in LowerFormalArguments() local
2735 LoadVT = MVT::i8; in LowerFormalArguments()
2740 LoadVT = MVT::i32; in LowerFormalArguments()
2742 EVT VecVT = EVT::getVectorVT(F->getContext(), LoadVT, NumElts); in LowerFormalArguments()
2756 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, LoadVT, P, in LowerFormalArguments()
2775 LoadVT.getFixedSizeInBits()) { in LowerFormalArguments()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 1442 bool isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT,
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| H A D | X86ISelLowering.cpp | 5968 bool X86TargetLowering::isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT, in isLoadBitCastBeneficial() argument
5971 if (!Subtarget.hasAVX512() && !LoadVT.isVector() && BitcastVT.isVector() && in isLoadBitCastBeneficial()
5975 if (!Subtarget.hasDQI() && BitcastVT == MVT::v8i1 && LoadVT == MVT::i8) in isLoadBitCastBeneficial()
5979 if (LoadVT.isVector() && BitcastVT.isVector() && in isLoadBitCastBeneficial()
5980 isTypeLegal(LoadVT) && isTypeLegal(BitcastVT)) in isLoadBitCastBeneficial()
5983 return TargetLowering::isLoadBitCastBeneficial(LoadVT, BitcastVT, DAG, MMO); in isLoadBitCastBeneficial()
43900 MVT LoadVT = VT.isFloatingPoint() ? MVT::getFloatingPointVT(SrcVTSize) in combineBitcast() local
43902 LoadVT = MVT::getVectorVT(LoadVT, SrcVT.getVectorNumElements()); in combineBitcast()
43904 SDVTList Tys = DAG.getVTList(LoadVT, MVT::Other); in combineBitcast()
52519 MVT LoadVT = MVT::getVectorVT(MemVT, 128 / NumBits); in combineX86INT_TO_FP() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 18522 EVT LoadVT = VT; in performLDNT1Combine() local
18524 LoadVT = VT.changeTypeToInteger(); in performLDNT1Combine()
18527 SDValue PassThru = DAG.getConstant(0, DL, LoadVT); in performLDNT1Combine()
18528 SDValue L = DAG.getMaskedLoad(LoadVT, DL, MINode->getChain(), in performLDNT1Combine()
18550 EVT LoadVT = VT; in performLD1ReplicateCombine() local
18552 LoadVT = VT.changeTypeToInteger(); in performLD1ReplicateCombine()
18555 SDValue Load = DAG.getNode(Opcode, DL, {LoadVT, MVT::Other}, Ops); in performLD1ReplicateCombine()
22950 EVT LoadVT = ContainerVT; in LowerFixedLengthVectorLoadToSVE() local
22956 LoadVT = ContainerVT.changeTypeToInteger(); in LowerFixedLengthVectorLoadToSVE()
22961 LoadVT, DL, Load->getChain(), Load->getBasePtr(), Load->getOffset(), Pg, in LowerFixedLengthVectorLoadToSVE()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 6803 EVT LoadVT = N->getValueType(0); in combineBSWAP() local
6804 if (LoadVT == MVT::i16) in combineBSWAP()
6805 LoadVT = MVT::i32; in combineBSWAP()
6808 DAG.getVTList(LoadVT, MVT::Other), in combineBSWAP()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 15413 MVT LoadVT = VT.getSimpleVT(); in PerformDAGCombine() local
15415 (LoadVT == MVT::v2f64 || LoadVT == MVT::v2i64 || in PerformDAGCombine()
15416 LoadVT == MVT::v4f32 || LoadVT == MVT::v4i32)) in PerformDAGCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 15934 EVT LoadVT = isLaneOp ? VecTy.getVectorElementType() : AlignedVecTy; in TryCombineBaseUpdate() local
15935 SDValue UpdN = DAG.getMemIntrinsicNode(NewOpc, dl, SDTys, Ops, LoadVT, in TryCombineBaseUpdate()
18632 EVT LoadVT = N->getOperand(0).getValueType().getHalfNumVectorElementsVT( in PerformMVEExtCombine() local
18635 LoadVT = LoadVT.getHalfNumVectorElementsVT(*DAG.getContext()); in PerformMVEExtCombine()
18651 VT, Chain, Ptr, MPI, LoadVT, Align(4)); in PerformMVEExtCombine()
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