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Searched refs:Load1 (Results 1 – 13 of 13) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstrInfo.h436 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
454 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
H A DX86InstrInfo.cpp7190 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
7192 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
7194 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr()
7365 return Load1->getOperand(I) == Load2->getOperand(I); in areLoadsFromSameBasePtr()
7378 auto Disp1 = dyn_cast<ConstantSDNode>(Load1->getOperand(X86::AddrDisp)); in areLoadsFromSameBasePtr()
7388 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
7395 unsigned Opc1 = Load1->getMachineOpcode(); in shouldScheduleLoadsNear()
7410 EVT VT = Load1->getValueType(0); in shouldScheduleLoadsNear()
H A DX86ISelLowering.cpp50314 SDValue Load1 = in combineLoad() local
50323 Load1.getValue(1), Load2.getValue(1)); in combineLoad()
50325 SDValue NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, RegVT, Load1, Load2); in combineLoad()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h247 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
258 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
H A DARMBaseInstrInfo.cpp1947 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1953 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
1956 switch (Load1->getMachineOpcode()) { in areLoadsFromSameBasePtr()
1998 if (Load1->getOperand(0) != Load2->getOperand(0) || in areLoadsFromSameBasePtr()
1999 Load1->getOperand(4) != Load2->getOperand(4)) in areLoadsFromSameBasePtr()
2003 if (Load1->getOperand(3) != Load2->getOperand(3)) in areLoadsFromSameBasePtr()
2007 if (isa<ConstantSDNode>(Load1->getOperand(1)) && in areLoadsFromSameBasePtr()
2009 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue(); in areLoadsFromSameBasePtr()
2028 bool ARMBaseInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
2044 if ((Load1->getMachineOpcode() != Load2->getMachineOpcode()) && in shouldScheduleLoadsNear()
[all …]
H A DARMISelLowering.cpp13489 LoadSDNode *Load1 = dyn_cast<LoadSDNode>(N1); in TryDistrubutionADDVecReduce() local
13490 if (!Load0 || !Load1 || Load0->getChain() != Load1->getChain() || in TryDistrubutionADDVecReduce()
13491 !Load0->isSimple() || !Load1->isSimple() || Load0->isIndexed() || in TryDistrubutionADDVecReduce()
13492 Load1->isIndexed()) in TryDistrubutionADDVecReduce()
13496 auto BaseLocDecomp1 = BaseIndexOffset::match(Load1, DAG); in TryDistrubutionADDVecReduce()
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1360 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1374 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp172 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr() argument
175 if (!Load0->isMachineOpcode() || !Load1->isMachineOpcode()) in areLoadsFromSameBasePtr()
179 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr()
188 if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
192 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
210 Offset1 = cast<ConstantSDNode>(Load1->getOperand(Offset1Idx))->getZExtValue(); in areLoadsFromSameBasePtr()
221 if (NumOps != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
225 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
230 if (NumOps == 5 && Load0->getOperand(1) != Load1->getOperand(1)) in areLoadsFromSameBasePtr()
236 dyn_cast<ConstantSDNode>(Load1->getOperand(NumOps - 3)); in areLoadsFromSameBasePtr()
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H A DSIInstrInfo.h191 bool areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, int64_t &Offset0,
204 bool shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0,
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp3222 SDValue Load1 = DAG.getLoad(LoadTy, dl, Chain, Base1, WideMMO); in LowerUnalignedLoad() local
3225 {Load1, Load0, BaseNoOff.getOperand(0)}); in LowerUnalignedLoad()
3227 Load0.getValue(1), Load1.getValue(1)); in LowerUnalignedLoad()
H A DHexagonISelLoweringHVX.cpp2993 SDValue Load1 = DAG.getLoad(SingleTy, dl, Chain, Base1, MOp1); in SplitHvxMemOp() local
2995 { DAG.getNode(ISD::CONCAT_VECTORS, dl, MemTy, Load0, Load1), in SplitHvxMemOp()
2997 Load0.getValue(1), Load1.getValue(1)) }, dl); in SplitHvxMemOp()
/openbsd-src/gnu/llvm/llvm/lib/Transforms/Instrumentation/
H A DDataFlowSanitizer.cpp2301 Value *Load1 = in loadShadowOriginSansLoadTracking() local
2303 return {combineShadows(Load, Load1, Pos), Origin}; in loadShadowOriginSansLoadTracking()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp11762 LoadSDNode *Load1 = cast<LoadSDNode>(Op1); in tryToFoldExtendSelectLoad() local
11764 if (!TLI.isLoadExtLegal(ExtLoadOpcode, VT, Load1->getMemoryVT()) || in tryToFoldExtendSelectLoad()