| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | RegisterPressure.h | 40 LaneBitmask LaneMask; member
42 RegisterMaskPair(Register RegUnit, LaneBitmask LaneMask) in RegisterMaskPair()
43 : RegUnit(RegUnit), LaneMask(LaneMask) {} in RegisterMaskPair()
263 LaneBitmask LaneMask; member
265 IndexMaskPair(unsigned Index, LaneBitmask LaneMask) in IndexMaskPair()
266 : Index(Index), LaneMask(LaneMask) {} in IndexMaskPair()
299 return I->LaneMask; in contains()
306 auto InsertRes = Regs.insert(IndexMaskPair(SparseIndex, Pair.LaneMask)); in insert()
308 LaneBitmask PrevMask = InsertRes.first->LaneMask; in insert()
309 InsertRes.first->LaneMask |= Pair.LaneMask; in insert()
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| H A D | ScheduleDAGInstrs.h | 55 LaneBitmask LaneMask; member
58 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
59 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} in VReg2SUnit()
70 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
72 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
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| H A D | LiveInterval.h | 696 LaneBitmask LaneMask; variable
699 SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {} in SubRange() argument
702 SubRange(LaneBitmask LaneMask, const LiveRange &Other, in SubRange() argument
704 : LiveRange(Other, Allocator), LaneMask(LaneMask) {} in SubRange()
786 LaneBitmask LaneMask) { in createSubRange() argument
787 SubRange *Range = new (Allocator) SubRange(LaneMask); in createSubRange()
795 LaneBitmask LaneMask, in createSubRangeFrom() argument
797 SubRange *Range = new (Allocator) SubRange(LaneMask, CopyFrom, Allocator); in createSubRangeFrom()
827 LaneBitmask LaneMask,
870 void refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
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| H A D | TargetRegisterInfo.h | 55 const LaneBitmask LaneMask; variable
210 return LaneMask; in getLaneMask()
391 LaneBitmask LaneMask,
686 LaneBitmask LaneMask) const { in reverseComposeSubRegIndexLaneMask() argument
688 return LaneMask; in reverseComposeSubRegIndexLaneMask()
689 return reverseComposeSubRegIndexLaneMaskImpl(IdxA, LaneMask); in reverseComposeSubRegIndexLaneMask()
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| H A D | MachineBasicBlock.h | 103 LaneBitmask LaneMask;
105 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
106 : PhysReg(PhysReg), LaneMask(LaneMask) {}
409 LaneBitmask LaneMask = LaneBitmask::getAll()) {
410 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
431 LaneBitmask LaneMask = LaneBitmask::getAll());
435 LaneBitmask LaneMask = LaneBitmask::getAll()) const;
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| H A D | LiveIntervalCalc.h | 39 void extendToUses(LiveRange &LR, Register Reg, LaneBitmask LaneMask,
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| H A D | LiveIntervals.h | 471 LaneBitmask LaneMask);
481 LaneBitmask LaneMask = LaneBitmask::getAll());
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | RegisterPressure.cpp | 101 if (!P.LaneMask.all()) in dump()
102 dbgs() << ':' << PrintLaneMask(P.LaneMask); in dump()
109 if (!P.LaneMask.all()) in dump()
110 dbgs() << ':' << PrintLaneMask(P.LaneMask); in dump()
366 LaneBitmask::getNone(), Pair.LaneMask); in initLiveThru()
377 return I->LaneMask; in getRegLanes()
383 assert(Pair.LaneMask.any()); in addRegLanes()
390 I->LaneMask |= Pair.LaneMask; in addRegLanes()
402 I->LaneMask = LaneBitmask::getNone(); in setRegZero()
409 assert(Pair.LaneMask.any()); in removeRegLanes()
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| H A D | MachineVerifier.cpp | 242 LaneBitmask LaneMask) const;
248 void report_context_lanemask(LaneBitmask LaneMask) const;
258 LaneBitmask LaneMask = LaneBitmask::getNone());
262 LaneBitmask LaneMask = LaneBitmask::getNone());
278 LaneBitmask LaneMask = LaneBitmask::getNone());
541 LaneBitmask LaneMask) const { in report_context()
544 if (LaneMask.any()) in report_context()
545 report_context_lanemask(LaneMask); in report_context()
576 void MachineVerifier::report_context_lanemask(LaneBitmask LaneMask) const { in report_context_lanemask()
577 errs() << "- lanemask: " << PrintLaneMask(LaneMask) << '\n'; in report_context_lanemask()
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| H A D | ScheduleDAGInstrs.cpp | 383 return (RegUse->LaneMask & getLaneMaskForMO(MO)).none(); in deadDefHasNoUse()
432 LaneBitmask LaneMask = I->LaneMask; in addVRegDefDeps() local
434 if ((LaneMask & KillLaneMask).none()) { in addVRegDefDeps()
439 if ((LaneMask & DefLaneMask).any()) { in addVRegDefDeps()
449 LaneMask &= ~KillLaneMask; in addVRegDefDeps()
451 if (LaneMask.any()) { in addVRegDefDeps()
452 I->LaneMask = LaneMask; in addVRegDefDeps()
470 LaneBitmask LaneMask = DefLaneMask; in addVRegDefDeps() local
474 if ((V2SU.LaneMask & LaneMask).none()) in addVRegDefDeps()
493 LaneBitmask OverlapMask = V2SU.LaneMask & LaneMask; in addVRegDefDeps()
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| H A D | LiveIntervals.cpp | 370 Register Reg, LaneBitmask LaneMask) { in extendSegmentsToUses() argument
381 if ((SR.LaneMask & M).any()) { in extendSegmentsToUses()
382 assert(SR.LaneMask == M && "Expecting lane masks to match exactly"); in extendSegmentsToUses()
390 const LiveRange &OldRange = getSubRange(LI, LaneMask); in extendSegmentsToUses()
437 assert(LaneMask.any() && in extendSegmentsToUses()
440 LI.computeSubRangeUndefs(Undefs, LaneMask, *MRI, *Indexes); in extendSegmentsToUses()
566 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in shrinkToUses() local
567 if ((LaneMask & SR.LaneMask).none()) in shrinkToUses()
595 extendSegmentsToUses(NewLR, WorkList, Reg, SR.LaneMask); in shrinkToUses()
770 DefinedLanesMask |= SR.LaneMask; in addKillFlags()
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| H A D | RenameIndependentSubregs.cpp | 183 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in findComponents() local
187 if ((SR.LaneMask & LaneMask).none()) in findComponents()
227 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in rewriteOperands() local
232 if ((SR.LaneMask & LaneMask).none()) in rewriteOperands()
285 SubRanges[ID-1] = Intervals[ID]->createSubRange(Allocator, SR.LaneMask); in distribute()
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| H A D | RegisterCoalescer.cpp | 269 LaneBitmask LaneMask, CoalescerPair &CP,
275 LaneBitmask LaneMask, const CoalescerPair &CP);
1000 MaskA |= SA.LaneMask; in removeCopyByCommutingDef()
1003 Allocator, SA.LaneMask, in removeCopyByCommutingDef()
1020 if ((SB.LaneMask & MaskA).any()) in removeCopyByCommutingDef()
1243 IntB.computeSubRangeUndefs(Undefs, SR.LaneMask, *MRI, in removePartialRedundancy()
1441 SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask); in reMaterializeTrivialDef()
1476 MaxMask &= ~SR.LaneMask; in reMaterializeTrivialDef()
1501 if ((SR.LaneMask & DstMask).none()) { in reMaterializeTrivialDef()
1504 << PrintLaneMask(SR.LaneMask) << " : " << SR << "\n"); in reMaterializeTrivialDef()
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| H A D | LiveInterval.cpp | 870 LaneBitmask LaneMask, in stripValuesNotDefiningMask() argument
900 if ((ExpectedDefMask & LaneMask).none()) in stripValuesNotDefiningMask()
917 BumpPtrAllocator &Allocator, LaneBitmask LaneMask, in refineSubRanges() argument
921 LaneBitmask ToApply = LaneMask; in refineSubRanges()
923 LaneBitmask SRMask = SR.LaneMask; in refineSubRanges()
924 LaneBitmask Matching = SRMask & LaneMask; in refineSubRanges()
935 SR.LaneMask = SRMask & ~Matching; in refineSubRanges()
942 stripValuesNotDefiningMask(reg(), SR, SR.LaneMask, Indexes, TRI, in refineSubRanges()
963 LaneBitmask LaneMask, in computeSubRangeUndefs() argument
968 assert((VRegMask & LaneMask).any()); in computeSubRangeUndefs()
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| H A D | LiveRangeEdit.cpp | 50 LI.createSubRange(Alloc, S.LaneMask); in createEmptyIntervalFrom()
144 if ((SR.LaneMask & LM).none()) in allUsesAvailableAt()
149 LM &= ~SR.LaneMask; in allUsesAvailableAt()
276 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubReg); in useIsKill() local
278 if ((S.LaneMask & LaneMask).any() && S.Query(Idx).isKill()) in useIsKill()
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| H A D | RDFRegisters.cpp | 37 if (RC->LaneMask != RI.RegClass->LaneMask) { in PhysicalRegisterInfo()
67 UI.Mask = RC->LaneMask; in PhysicalRegisterInfo()
177 if (RC != nullptr && (RR.Mask & RC->LaneMask) == RC->LaneMask) in aliasRM()
237 LaneBitmask RCM = RI.RegClass ? RI.RegClass->LaneMask in mapTo()
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| H A D | SplitKit.cpp | 393 if (S.LaneMask == LM) in getSubrangeImpl()
415 if ((S.LaneMask & LM) == LM) in getSubRangeForMask()
432 auto &PS = getSubRangeForMask(S.LaneMask, Edit->getParent()); in addDeadDef()
456 if ((S.LaneMask & LM).any()) in addDeadDef()
537 LaneBitmask LaneMask, MachineBasicBlock &MBB, in buildCopy() argument
541 if (LaneMask.all() || LaneMask == MRI.getMaxLaneMaskForVReg(FromReg)) { in buildCopy()
561 if (!TRI.getCoveringSubRegIndexes(MRI, RC, LaneMask, SubIndexes)) in buildCopy()
572 Allocator, LaneMask, in buildCopy()
608 LaneBitmask LaneMask; in defFromParent() local
610 LaneMask = LaneBitmask::getNone(); in defFromParent()
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| H A D | MachineBasicBlock.cpp | 421 if (!LI.LaneMask.all()) in print()
422 OS << ":0x" << PrintLaneMask(LI.LaneMask); in print()
583 void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) { in removeLiveIn() argument
589 I->LaneMask &= ~LaneMask; in removeLiveIn()
590 if (I->LaneMask.none()) in removeLiveIn()
601 bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const { in isLiveIn()
604 return I != livein_end() && (I->LaneMask & LaneMask).any(); in isLiveIn()
618 LaneBitmask LaneMask = I->LaneMask; in sortUniqueLiveIns() local
620 LaneMask |= J->LaneMask; in sortUniqueLiveIns()
622 Out->LaneMask = LaneMask; in sortUniqueLiveIns()
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| H A D | VirtRegMap.cpp | 320 LaneBitmask LaneMask; in addLiveInsForSubRanges() local
329 LaneMask |= SR->LaneMask; in addLiveInsForSubRanges()
331 if (LaneMask.none()) in addLiveInsForSubRanges()
334 MBB->addLiveIn(PhysReg, LaneMask); in addLiveInsForSubRanges()
401 if ((SR.LaneMask & UseMask).any() && SR.liveAt(BaseIndex)) in readsUndefSubreg()
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| H A D | TargetRegisterInfo.cpp | 526 LaneBitmask LaneMask, SmallVectorImpl<unsigned> &NeededIndexes) const { in getCoveringSubRegIndexes() argument
537 if (SubRegMask == LaneMask) { in getCoveringSubRegIndexes()
543 if ((SubRegMask & ~LaneMask).any()) in getCoveringSubRegIndexes()
562 LaneBitmask LanesLeft = LaneMask & ~getSubRegIndexLaneMask(BestIdx); in getCoveringSubRegIndexes()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/MC/ |
| H A D | LaneBitmask.h | 92 inline Printable PrintLaneMask(LaneBitmask LaneMask) { in PrintLaneMask() argument
93 return Printable([LaneMask](raw_ostream &OS) { in PrintLaneMask()
94 OS << format(LaneBitmask::FormatStr, LaneMask.getAsInteger()); in PrintLaneMask()
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| /openbsd-src/gnu/llvm/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 104 if (LaneMask.any()) in computeLaneMask()
105 return LaneMask; in computeLaneMask()
108 LaneMask = LaneBitmask::getAll(); in computeLaneMask()
115 LaneMask = M; in computeLaneMask()
116 return LaneMask; in computeLaneMask()
1505 Idx.LaneMask = LaneBitmask::getLane(Bit); in computeSubRegLaneMasks()
1508 Idx.LaneMask = LaneBitmask::getNone(); in computeSubRegLaneMasks()
1527 unsigned DstBit = Idx.LaneMask.getHighestLane(); in computeSubRegLaneMasks()
1528 assert(Idx.LaneMask == LaneBitmask::getLane(DstBit) && in computeSubRegLaneMasks()
1547 assert(Idx2.LaneMask == SrcMask); in computeSubRegLaneMasks()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.cpp | 205 I->LaneMask |= UsedMask; in collectVirtualRegUses()
224 LiveMask |= S.LaneMask; in getLiveLaneMask()
284 AtMIPressure.inc(U.RegUnit, LiveMask, LiveMask | U.LaneMask, *MRI); in recede()
307 LiveMask |= U.LaneMask; in recede()
345 It.second &= ~S.LaneMask; in advanceBeforeNext()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | RDFCopy.cpp | 124 if ((RC.LaneMask & RR.Mask) == RC.LaneMask) in run()
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| H A D | HexagonBlockRanges.cpp | 240 if (I.LaneMask.all() || (I.LaneMask.any() && !S.isValid())) { in getLiveIns()
246 if ((I.LaneMask & TRI.getSubRegIndexLaneMask(SI)).any()) in getLiveIns()
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