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Searched refs:LR (Results 1 – 25 of 215) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DLiveRangeUtils.h26 static void DistributeRange(LiveRangeT &LR, LiveRangeT *SplitLRs[], in DistributeRange() argument
29 typename LiveRangeT::iterator J = LR.begin(), E = LR.end(); in DistributeRange()
40 LR.segments.erase(J, E); in DistributeRange()
43 unsigned j = 0, e = LR.getNumValNums(); in DistributeRange()
47 VNInfo *VNI = LR.getValNumInfo(i); in DistributeRange()
53 LR.valnos[j++] = VNI; in DistributeRange()
56 LR.valnos.resize(j); in DistributeRange()
H A DLiveRangeCalc.cpp81 Updater.setDest(&I.LR); in updateFromLiveIns()
87 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg, in extend() argument
97 auto EP = LR.extendInBlock(Undefs, Indexes->getMBBStartIdx(UseMBB), Use); in extend()
105 if (findReachingDefs(LR, *UseMBB, Use, PhysReg, Undefs)) in extend()
122 bool LiveRangeCalc::isDefOnEntry(LiveRange &LR, ArrayRef<SlotIndex> Undefs, in isDefOnEntry() argument
159 LiveRange::iterator UB = upper_bound(LR, End.getPrevSlot()); in isDefOnEntry()
160 if (UB != LR.begin()) { in isDefOnEntry()
167 if (LR.isUndefIn(Undefs, Seg.end, End)) in isDefOnEntry()
175 if (UndefOnEntry[N] || LR.isUndefIn(Undefs, Begin, End)) { in isDefOnEntry()
191 bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB, in findReachingDefs() argument
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H A DLiveInterval.cpp67 LiveRange *LR; member in __anon01eff5e00111::CalcLiveRangeUtilBase
70 CalcLiveRangeUtilBase(LiveRange *LR) : LR(LR) {} in CalcLiveRangeUtilBase() argument
94 VNInfo *VNI = ForVNI ? ForVNI : LR->getNextValue(Def, *VNInfoAllocator); in createDeadDef()
115 VNInfo *VNI = ForVNI ? ForVNI : LR->getNextValue(Def, *VNInfoAllocator); in createDeadDef()
142 return std::make_pair(nullptr, LR->isUndefIn(Undefs, StartIdx, BeforeUse)); in extendInBlock()
145 return std::make_pair(nullptr, LR->isUndefIn(Undefs, StartIdx, BeforeUse)); in extendInBlock()
147 if (LR->isUndefIn(Undefs, I->end, BeforeUse)) in extendInBlock()
288 CalcLiveRangeUtilVector(LiveRange *LR) : CalcLiveRangeUtilVectorBase(LR) {} in CalcLiveRangeUtilVector() argument
293 LiveRange::Segments &segmentsColl() { return LR->segments; } in segmentsColl()
295 void insertAtEnd(const Segment &S) { LR->segments.push_back(S); } in insertAtEnd()
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H A DLiveIntervals.cpp112 for (LiveRange *LR : RegUnitRanges) in releaseMemory()
113 delete LR; in releaseMemory()
153 if (LiveRange *LR = RegUnitRanges[Unit]) in print() local
154 OS << printRegUnit(Unit, TRI) << ' ' << *LR << '\n'; in print()
271 void LiveIntervals::computeRegUnitRange(LiveRange &LR, unsigned Unit) { in computeRegUnitRange() argument
287 LICalc->createDeadDefs(LR, Reg); in computeRegUnitRange()
306 LICalc->extendToUses(LR, Reg); in computeRegUnitRange()
313 LR.flushSegmentSet(); in computeRegUnitRange()
338 LiveRange *LR = RegUnitRanges[Unit]; in computeLiveInRegUnits() local
339 if (!LR) { in computeLiveInRegUnits()
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H A DLiveRegMatrix.cpp178 LiveIntervalUnion::Query &LiveRegMatrix::query(const LiveRange &LR, in query() argument
181 Q.init(UserTag, LR, Matrix[RegUnit]); in query()
201 [&](MCRegister Unit, const LiveRange &LR) { in checkInterference() argument
202 return query(LR, Unit).checkInterference(); in checkInterference()
215 LiveRange LR; in checkInterference() local
216 LR.addSegment(Seg); in checkInterference()
233 Q.reset(UserTag, LR, Matrix[*Units]); in checkInterference()
H A DLiveIntervalCalc.cpp34 LiveRange &LR, const MachineOperand &MO) { in createDeadDef() argument
40 LR.createDeadDef(DefIdx, Alloc); in createDeadDef()
124 void LiveIntervalCalc::createDeadDefs(LiveRange &LR, Register Reg) { in createDeadDefs() argument
133 createDeadDef(*Indexes, *Alloc, LR, MO); in createDeadDefs()
136 void LiveIntervalCalc::extendToUses(LiveRange &LR, Register Reg, in extendToUses() argument
194 extend(LR, UseIdx, Reg, Undefs); in extendToUses()
H A DMachineVerifier.cpp241 void report_context(const LiveRange &LR, Register VRegUnit,
247 void report_context_liverange(const LiveRange &LR) const;
256 SlotIndex UseIdx, const LiveRange &LR,
260 SlotIndex DefIdx, const LiveRange &LR,
540 void MachineVerifier::report_context(const LiveRange &LR, Register VRegUnit, in report_context() argument
542 report_context_liverange(LR); in report_context()
556 void MachineVerifier::report_context_liverange(const LiveRange &LR) const { in report_context_liverange()
557 errs() << "- liverange: " << LR << '\n'; in report_context_liverange()
2315 const LiveRange &LR, in checkLivenessAtUse() argument
2318 LiveQueryResult LRQ = LR.Query(UseIdx); in checkLivenessAtUse()
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H A DRegAllocFast.cpp263 void allocVirtReg(MachineInstr &MI, LiveReg &LR, Register Hint,
550 for (const LiveReg &LR : LiveVirtRegs) { in reloadAtBegin() local
551 MCPhysReg PhysReg = LR.PhysReg; in reloadAtBegin()
566 reload(MBB.begin(), LR.VirtReg, PhysReg); in reloadAtBegin()
568 reload(InsertBefore, LR.VirtReg, PhysReg); in reloadAtBegin()
705 void RegAllocFast::assignVirtToPhysReg(MachineInstr &AtMI, LiveReg &LR, in assignVirtToPhysReg() argument
707 Register VirtReg = LR.VirtReg; in assignVirtToPhysReg()
710 assert(LR.PhysReg == 0 && "Already assigned a physreg"); in assignVirtToPhysReg()
712 LR.PhysReg = PhysReg; in assignVirtToPhysReg()
759 void RegAllocFast::allocVirtReg(MachineInstr &MI, LiveReg &LR, in allocVirtReg() argument
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H A DLiveIntervalUnion.cpp141 if (LR->empty() || LiveUnion->empty()) { in collectInterferingVRegs()
147 LRI = LR->begin(); in collectInterferingVRegs()
152 LiveRange::const_iterator LREnd = LR->end(); in collectInterferingVRegs()
179 LRI = LR->advanceTo(LRI, LiveUnionI.start()); in collectInterferingVRegs()
H A DRegisterCoalescer.cpp1550 if (LiveRange *LR = LIS->getCachedRegUnit(*Units)) in reMaterializeTrivialDef() local
1551 LR->createDeadDef(NewMIIdx.getRegSlot(), LIS->getVNInfoAllocator()); in reMaterializeTrivialDef()
1565 if (LiveRange *LR = LIS->getCachedRegUnit(*Units)) in reMaterializeTrivialDef() local
1566 LR->createDeadDef(NewMIIdx.getRegSlot(), LIS->getVNInfoAllocator()); in reMaterializeTrivialDef()
2251 LiveRange &LR = LIS->getRegUnit(*UI); in joinReservedPhysReg() local
2252 LR.createDeadDef(DestRegIdx, LIS->getVNInfoAllocator()); in joinReservedPhysReg()
2336 LiveRange &LR; member in __anone48f13810311::JoinVals
2509 JoinVals(LiveRange &LR, Register Reg, unsigned SubIdx, LaneBitmask LaneMask, in JoinVals() argument
2513 : LR(LR), Reg(Reg), SubIdx(SubIdx), LaneMask(LaneMask), in JoinVals()
2516 TRI(TRI), Assignments(LR.getNumValNums(), -1), in JoinVals()
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/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DLiveRangeCalc.h103 LiveRange &LR; member
117 LiveInBlock(LiveRange &LR, MachineDomTreeNode *node, SlotIndex kill) in LiveInBlock()
118 : LR(LR), DomNode(node), Kill(kill) {} in LiveInBlock()
129 bool isDefOnEntry(LiveRange &LR, ArrayRef<SlotIndex> Undefs,
149 bool findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB, SlotIndex Use,
207 void extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg,
243 void addLiveInBlock(LiveRange &LR, MachineDomTreeNode *DomNode,
245 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
H A DLiveIntervals.h182 void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices,
185 void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices) { in extendToIndices() argument
186 extendToIndices(LR, Indices, /*Undefs=*/{}); in extendToIndices()
196 void pruneValue(LiveRange &LR, SlotIndex Kill,
239 bool isLiveInToMBB(const LiveRange &LR, in isLiveInToMBB() argument
241 return LR.liveAt(getMBBStartIdx(mbb)); in isLiveInToMBB()
244 bool isLiveOutOfMBB(const LiveRange &LR, in isLiveOutOfMBB() argument
246 return LR.liveAt(getMBBEndIdx(mbb).getPrevSlot()); in isLiveOutOfMBB()
388 LiveRange *LR = RegUnitRanges[Unit]; in getRegUnit() local
389 if (!LR) { in getRegUnit()
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H A DLiveIntervalCalc.h39 void extendToUses(LiveRange &LR, Register Reg, LaneBitmask LaneMask,
48 void createDeadDefs(LiveRange &LR, Register Reg);
54 void extendToUses(LiveRange &LR, MCRegister PhysReg) { in extendToUses() argument
55 extendToUses(LR, PhysReg, LaneBitmask::getAll()); in extendToUses()
H A DLiveIntervalUnion.h114 const LiveRange *LR = nullptr; variable
132 Query(const LiveRange &LR, const LiveIntervalUnion &LIU) in Query() argument
133 : LiveUnion(&LIU), LR(&LR) {} in Query()
140 LR = &NewLR; in reset()
150 if (UserTag == NewUserTag && LR == &NewLR && LiveUnion == &NewLiveUnion && in init()
/openbsd-src/gnu/llvm/llvm/lib/DebugInfo/GSYM/
H A DFunctionInfo.cpp158 LookupResult LR; in lookup() local
159 LR.LookupAddr = Addr; in lookup()
161 LR.FuncRange = {FuncAddr, FuncAddr + Data.getU32(&Offset)}; in lookup()
172 if (LR.FuncRange.size() > 0 && !LR.FuncRange.contains(Addr)) in lookup()
180 LR.FuncName = GR.getString(NameOffset); in lookup()
224 SrcLoc.Name = LR.FuncName; in lookup()
226 LR.Locations.push_back(SrcLoc); in lookup()
227 return LR; in lookup()
237 SrcLoc.Name = LR.FuncName; in lookup()
242 LR.Locations.push_back(SrcLoc); in lookup()
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H A DLookupResult.cpp60 raw_ostream &llvm::gsym::operator<<(raw_ostream &OS, const LookupResult &LR) { in operator <<() argument
61 OS << HEX64(LR.LookupAddr) << ": "; in operator <<()
62 auto NumLocations = LR.Locations.size(); in operator <<()
69 OS << LR.Locations[I]; in operator <<()
H A DDwarfTransformer.cpp526 auto LR = Gsym->lookup(Addr); in verify() local
527 if (!LR) in verify()
528 return LR.takeError(); in verify()
545 NumDwarfInlineInfos != LR->Locations.size()) { in verify()
548 << LR->Locations.size() << "\n"; in verify()
555 Log << " " << LR->Locations.size() << " GSYM frames:\n"; in verify()
556 for (size_t Idx = 0, count = LR->Locations.size(); in verify()
558 const auto &gii = LR->Locations[Idx]; in verify()
567 for (size_t Idx = 0, count = LR->Locations.size(); Idx < count; in verify()
569 const auto &gii = LR->Locations[Idx]; in verify()
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/openbsd-src/gnu/llvm/llvm/lib/ExecutionEngine/Orc/
H A DEPCGenericDylibManager.cpp49 static size_t size(const ExecutorProcessControl::LookupRequest &LR) { in size() argument
50 return MemberSerialization::size(ExecutorAddr(LR.Handle), LR.Symbols); in size()
54 const ExecutorProcessControl::LookupRequest &LR) { in serialize() argument
55 return MemberSerialization::serialize(OB, ExecutorAddr(LR.Handle), in serialize()
56 LR.Symbols); in serialize()
/openbsd-src/gnu/llvm/clang/lib/Sema/
H A DSemaRISCVVectorLookup.cpp154 void CreateRVVIntrinsicDecl(LookupResult &LR, IdentifierInfo *II,
165 bool CreateIntrinsicIfFound(LookupResult &LR, IdentifierInfo *II,
346 void RISCVIntrinsicManagerImpl::CreateRVVIntrinsicDecl(LookupResult &LR, in CreateRVVIntrinsicDecl() argument
369 SourceLocation Loc = LR.getNameLoc(); in CreateRVVIntrinsicDecl()
402 LR.addDecl(RVVIntrinsicDecl); in CreateRVVIntrinsicDecl()
405 bool RISCVIntrinsicManagerImpl::CreateIntrinsicIfFound(LookupResult &LR, in CreateIntrinsicIfFound() argument
415 CreateRVVIntrinsicDecl(LR, II, PP, Index, in CreateIntrinsicIfFound()
419 LR.resolveKind(); in CreateIntrinsicIfFound()
426 CreateRVVIntrinsicDecl(LR, II, PP, Itr->second, in CreateIntrinsicIfFound()
/openbsd-src/gnu/llvm/clang/lib/StaticAnalyzer/Checkers/
H A DPointerSubChecker.cpp44 const MemRegion *LR = LV.getAsRegion(); in checkPreStmt() local
47 if (!(LR && RR)) in checkPreStmt()
50 const MemRegion *BaseLR = LR->getBaseRegion(); in checkPreStmt()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMCallingConv.td270 def CSR_AAPCS : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6, R5, R4,
275 def CSR_Win_AAPCS_CFGuard_Check : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7,
288 def CSR_ATPCS_SplitPush : CalleeSavedRegs<(add LR, R7, R6, R5, R4,
294 LR, R11)>;
308 def CSR_AAPCS_SplitPush : CalleeSavedRegs<(add LR, R11,
317 def CSR_AAPCS_ThisReturn : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6,
323 def CSR_iOS : CalleeSavedRegs<(add LR, R7, R6, R5, R4, (sub CSR_AAPCS, R9))>;
331 def CSR_iOS_ThisReturn : CalleeSavedRegs<(add LR, R7, R6, R5, R4,
335 : CalleeSavedRegs<(add LR, SP, (sub(sequence "R%u", 12, 1), R9, R12),
344 def CSR_iOS_CXX_TLS_PE : CalleeSavedRegs<(add LR, R12, R11, R7, R5, R4)>;
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H A DARMRegisterInfo.td96 def LR : ARMReg<14, "lr", [], ["r14"]>, DwarfRegNum<[14]>;
228 SP, LR, PC)> {
229 // Allocate LR as the first CSR since it is always saved anyway.
234 let AltOrders = [(add LR, GPR), (trunc GPR, 8),
235 (add (trunc GPR, 8), R12, LR, (shl GPR, 8))];
245 def GPRnoip : RegisterClass<"ARM", [i32], 32, (sub GPR, R12, LR)> {
246 // Allocate LR as the first CSR since it is always saved anyway.
263 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8),
264 (add (trunc GPRnopc, 8), R12, LR, (shl GPRnopc, 8))];
275 let AltOrders = [(add LR, GPRnopc), (trunc GPRnopc, 8)];
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H A DThumb1FrameLowering.cpp230 case ARM::LR: in emitPrologue()
380 case ARM::LR: in emitPrologue()
607 if (CSI.getReg() == ARM::LR) in needPopSpecialFixUp()
725 GPRsNoLRSP.reset(ARM::LR); in emitPopSpecialFixUp()
765 .addReg(ARM::LR, RegState::Define) in emitPopSpecialFixUp()
823 .addReg(ARM::LR, RegState::Define) in emitPopSpecialFixUp()
839 ARM::R7, ARM::LR};
844 ARM::R5, ARM::R6, ARM::R7, ARM::LR};
850 if (ARM::tGPRRegClass.contains(Reg) || Reg == ARM::LR) { in splitLowAndHighRegs()
852 } else if (ARM::hGPRRegClass.contains(Reg) && Reg != ARM::LR) { in splitLowAndHighRegs()
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/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64LowerHomogeneousPrologEpilog.cpp293 auto LRIdx = std::distance(Regs.begin(), llvm::find(Regs, AArch64::LR)); in getOrCreateFrameHelper()
298 assert(Regs[Size - 2] != AArch64::LR); in getOrCreateFrameHelper()
306 if (Regs[I - 1] == AArch64::LR) in getOrCreateFrameHelper()
320 .addReg(AArch64::LR); in getOrCreateFrameHelper()
330 .addUse(AArch64::LR) in getOrCreateFrameHelper()
341 .addReg(Type == FrameHelperType::Epilog ? AArch64::X16 : AArch64::LR); in getOrCreateFrameHelper()
366 if (!llvm::is_contained(Regs, AArch64::LR)) in shouldUseFrameHelper()
514 if (MO.getReg() == AArch64::LR) in lowerProlog()
531 emitStore(MF, MBB, MBBI, *TII, AArch64::LR, AArch64::FP, -LRIdx - 2, true); in lowerProlog()
543 emitStore(MF, MBB, MBBI, *TII, AArch64::LR, AArch64::FP, -LRIdx - 2, true); in lowerProlog()
H A DAArch64CallingConvention.td391 // requires the frame-record (LR, FP) to be at the top the callee-save area,
394 // FIXME: LR is only callee-saved in the sense that *we* preserve it and are
396 // is currently safe since BL has LR as an implicit-def and what happens after a
401 // end up saving LR as part of a call frame). Watch this space...
403 X25, X26, X27, X28, LR, FP,
411 // Win64 has unwinding codes for an (FP,LR) pair, save_fplr and save_fplr_x.
412 // We put FP before LR, so that frame lowering logic generates (FP,LR) pairs,
413 // and not (LR,FP) pairs.
415 X25, X26, X27, X28, FP, LR,
428 X25, X26, X27, X28, LR, FP,
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