| /openbsd-src/gnu/llvm/llvm/include/llvm/Object/ |
| H A D | ELFTypes.h | 48 template <endianness E, bool Is64> struct ELFType { 55 static const bool Is64Bits = Is64; 57 using uint = std::conditional_t<Is64, uint64_t, uint32_t>; 58 using Ehdr = Elf_Ehdr_Impl<ELFType<E, Is64>>; 59 using Shdr = Elf_Shdr_Impl<ELFType<E, Is64>>; 60 using Sym = Elf_Sym_Impl<ELFType<E, Is64>>; 61 using Dyn = Elf_Dyn_Impl<ELFType<E, Is64>>; 62 using Phdr = Elf_Phdr_Impl<ELFType<E, Is64>>; 63 using Rel = Elf_Rel_Impl<ELFType<E, Is64>, false>; 64 using Rela = Elf_Rel_Impl<ELFType<E, Is64>, true>; [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/ObjectYAML/ |
| H A D | XCOFFYAML.cpp | 228 static void auxSymMapping(IO &IO, XCOFFYAML::CsectAuxEnt &AuxSym, bool Is64) { in auxSymMapping() argument 233 if (Is64) { in auxSymMapping() 248 static void auxSymMapping(IO &IO, XCOFFYAML::BlockAuxEnt &AuxSym, bool Is64) { in auxSymMapping() argument 249 if (Is64) { in auxSymMapping() 258 bool Is64) { in auxSymMapping() argument 259 if (!Is64) in auxSymMapping() 286 const bool Is64 = in mapping() local 293 if (!Is64) in mapping() 301 auxSymMapping(IO, *cast<XCOFFYAML::FunctionAuxEnt>(AuxSym.get()), Is64); in mapping() 305 auxSymMapping(IO, *cast<XCOFFYAML::BlockAuxEnt>(AuxSym.get()), Is64); in mapping() [all …]
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| H A D | ELFYAML.cpp | 1273 const bool Is64 = static_cast<ELFYAML::Object *>(Ctx)->Header.Class == in input() local 1282 const int64_t MinVal = Is64 ? INT64_MIN : INT32_MIN; in input() 1290 const uint64_t MaxVal = Is64 ? UINT64_MAX : UINT32_MAX; in input()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/ObjCopy/ |
| H A D | CommonConfig.h | 41 MachineInfo(uint16_t EM, uint8_t ABI, bool Is64, bool IsLittle) in MachineInfo() 42 : EMachine(EM), OSABI(ABI), Is64Bit(Is64), IsLittleEndian(IsLittle) {} in MachineInfo() 44 MachineInfo(uint16_t EM, bool Is64, bool IsLittle) in MachineInfo() 45 : MachineInfo(EM, ELF::ELFOSABI_NONE, Is64, IsLittle) {} in MachineInfo()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCAsmBackend.cpp | 225 bool Is64 = TT.isPPC64(); in createObjectTargetWriter() local 226 return createPPCELFObjectWriter(Is64, OSABI); in createObjectTargetWriter()
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| /openbsd-src/gnu/llvm/llvm/tools/llvm-objdump/ |
| H A D | COFFDump.cpp | 43 Is64 = !Obj.getPE32Header(); in COFFDumper() 50 return format_hex_no_prefix(V, Is64 ? 16 : 8); in formatAddr() 54 return Is64 ? 0 : static_cast<const pe32_header *>(Hdr)->BaseOfData; in getBaseOfData() 58 bool Is64; member in __anon009d195d0111::COFFDumper 114 if (!Is64) in printPEHeader()
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| H A D | MachODump.cpp | 8072 CompactUnwindEntry(StringRef Contents, unsigned Offset, bool Is64) in CompactUnwindEntry() 8074 if (Is64) in CompactUnwindEntry() 8177 bool Is64 = Obj->is64Bit(); in printMachOCompactUnwindSection() local 8178 uint32_t PointerSize = Is64 ? sizeof(uint64_t) : sizeof(uint32_t); in printMachOCompactUnwindSection() 8187 CompactUnwindEntry Entry(Contents, Offset, Is64); in printMachOCompactUnwindSection()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsELFObjectWriter.cpp | 59 MipsELFObjectWriter(uint8_t OSABI, bool HasRelocationAddend, bool Is64); 214 bool HasRelocationAddend, bool Is64) in MipsELFObjectWriter() argument 215 : MCELFObjectTargetWriter(Is64, OSABI, ELF::EM_MIPS, HasRelocationAddend) {} in MipsELFObjectWriter()
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| /openbsd-src/gnu/llvm/llvm/lib/ObjCopy/COFF/ |
| H A D | COFFWriter.cpp | 195 PeHeaderSize = Obj.Is64 ? sizeof(pe32plus_header) : sizeof(pe32_header); in finalize() 292 if (Obj.Is64) { in writeHeaders()
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| H A D | COFFObject.h | 103 bool Is64 = false; member
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| H A D | COFFReader.cpp | 28 Obj.Is64 = COFFObj.is64(); in readExecutableHeaders()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 271 static unsigned getLogicalBitOpcode(unsigned Opc, bool Is64) { in getLogicalBitOpcode() argument 274 return Is64 ? AMDGPU::S_AND_B64 : AMDGPU::S_AND_B32; in getLogicalBitOpcode() 276 return Is64 ? AMDGPU::S_OR_B64 : AMDGPU::S_OR_B32; in getLogicalBitOpcode() 278 return Is64 ? AMDGPU::S_XOR_B64 : AMDGPU::S_XOR_B32; in getLogicalBitOpcode() 293 bool Is64 = Size > 32 || (DstRB->getID() == AMDGPU::VCCRegBankID && in selectG_AND_OR_XOR() local 295 I.setDesc(TII.get(getLogicalBitOpcode(I.getOpcode(), Is64))); in selectG_AND_OR_XOR() 1381 const bool Is64 = Size == 64; in selectBallot() local 1392 unsigned Opcode = Is64 ? AMDGPU::S_MOV_B64 : AMDGPU::S_MOV_B32; in selectBallot() 1395 Register SrcReg = Is64 ? AMDGPU::EXEC : AMDGPU::EXEC_LO; in selectBallot() 1908 const bool Is64 = MRI->getType(VDataOut).getSizeInBits() == 64; in selectImageIntrinsic() local [all …]
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| H A D | MIMGInstructions.td | 1134 class MIMG_IntersectRay_Helper<bit Is64, bit IsA16> { 1135 int num_addrs = !if(Is64, !if(IsA16, 9, 12), !if(IsA16, 8, 11)); 1140 RegisterClass node_ptr_type = !if(Is64, VReg_64, VGPR_32); 1185 multiclass MIMG_IntersectRay<mimgopc op, string opcode, bit Is64, bit IsA16> { 1186 defvar info = MIMG_IntersectRay_Helper<Is64, IsA16>;
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| H A D | AMDGPULegalizerInfo.cpp | 5423 const bool Is64 = MRI.getType(NodePtr).getSizeInBits() == 64; in legalizeBVHIntrinsic() local 5425 const unsigned NumVAddrDwords = IsA16 ? (Is64 ? 9 : 8) : (Is64 ? 12 : 11); in legalizeBVHIntrinsic() 5434 Opcode = AMDGPU::getMIMGOpcode(BaseOpcodes[Is64][IsA16], in legalizeBVHIntrinsic() 5440 BaseOpcodes[Is64][IsA16], in legalizeBVHIntrinsic() 5482 if (Is64) { in legalizeBVHIntrinsic()
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| H A D | SIISelLowering.cpp | 7748 const bool Is64 = NodePtr.getValueType() == MVT::i64; in LowerINTRINSIC_W_CHAIN() local 7750 const unsigned NumVAddrDwords = IsA16 ? (Is64 ? 9 : 8) : (Is64 ? 12 : 11); in LowerINTRINSIC_W_CHAIN() 7760 Opcode = AMDGPU::getMIMGOpcode(BaseOpcodes[Is64][IsA16], in LowerINTRINSIC_W_CHAIN() 7766 AMDGPU::getMIMGOpcode(BaseOpcodes[Is64][IsA16], in LowerINTRINSIC_W_CHAIN() 7821 if (Is64) in LowerINTRINSIC_W_CHAIN()
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| H A D | AMDGPURegisterBankInfo.cpp | 881 bool Is64 = OpSize % 64 == 0; in executeInWaterfallLoop() local 882 unsigned PartSize = Is64 ? 64 : 32; in executeInWaterfallLoop()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitTracker.cpp | 1253 bool Is64 = DoubleRegsRegClass.contains(PReg); in getNextPhysReg() local 1254 assert(PReg == 0 || Is64 || IntRegsRegClass.contains(PReg)); in getNextPhysReg() 1268 if (!Is64) { in getNextPhysReg()
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| /openbsd-src/gnu/llvm/llvm/tools/llvm-readobj/ |
| H A D | ELFDumper.cpp | 4115 constexpr bool Is64 = ELFT::Is64Bits; in printSectionDetails() local 4117 {Is64 ? "Address" : "Addr", 23}, in printSectionDetails() 4118 {"Off", Is64 ? 40 : 32}, in printSectionDetails() 4119 {"Size", Is64 ? 47 : 39}, in printSectionDetails() 4120 {"ES", Is64 ? 54 : 46}, in printSectionDetails() 4121 {"Lk", Is64 ? 59 : 51}, in printSectionDetails() 4122 {"Inf", Is64 ? 62 : 54}, in printSectionDetails() 4123 {"Al", Is64 ? 66 : 57}}); in printSectionDetails() 4134 const unsigned AddrSize = Is64 ? 16 : 8; in printSectionDetails() 4149 {to_string(format_hex_no_prefix(S.sh_offset, 6)), Is64 ? 39 : 32}, in printSectionDetails() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/DWP/ |
| H A D | DWP.cpp | 293 bool Is64 = isa<object::ELF64LEObjectFile>(Obj) || in handleCompressedSection() local 295 Expected<Decompressor> Dec = Decompressor::create(Name, Contents, IsLE, Is64); in handleCompressedSection()
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| /openbsd-src/gnu/llvm/llvm/lib/Object/ |
| H A D | MachOObjectFile.cpp | 101 bool Is64 = O.is64Bit(); in getSectionPtr() local 102 unsigned SegmentLoadSize = Is64 ? sizeof(MachO::segment_command_64) : in getSectionPtr() 104 unsigned SectionSize = Is64 ? sizeof(MachO::section_64) : in getSectionPtr()
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| /openbsd-src/gnu/llvm/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 10434 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; in EmitAArch64BuiltinExpr() local 10435 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; in EmitAArch64BuiltinExpr() 10436 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; in EmitAArch64BuiltinExpr()
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