Searched refs:ILP (Results 1 – 14 of 14) sorted by relevance
103 while providing easy ILP for single-threaded onces. But it is probably
2507 bool LStall = (!checkPref || left->SchedulingPref == Sched::ILP) && in BUCompareLatency()2509 bool RStall = (!checkPref || right->SchedulingPref == Sched::ILP) && in BUCompareLatency()2525 if (!checkPref || (left->SchedulingPref == Sched::ILP || in BUCompareLatency()2526 right->SchedulingPref == Sched::ILP)) { in BUCompareLatency()
278 assert(TLI->getSchedulingPreference() == Sched::ILP && in createDefaultScheduler()
353 The Loop Vectorizer increases the instruction level parallelism (ILP) by
686 vhaddps. Long data dependencies negatively impact the ILP (Instruction Level696 which may limit the ILP. Last row, ``<total>``, shows a global average over all
719 SchedPreferenceInfo = Sched::ILP; in TargetLoweringBase()
103 ILP, // Scheduling for ILP in low register pressure mode. enumerator
4027 improve instruction-level parallelism (ILP) using advanced hardware features,4089 opportunities for ILP. Loops can be fully or partially unrolled. Full unrolling
1952 return Sched::ILP; in getSchedulingPreference()1967 return Sched::ILP; in getSchedulingPreference()
17056 return Sched::ILP; in getSchedulingPreference()
124 setSchedulingPreference(Sched::ILP); in X86TargetLowering()126 setSchedulingPreference(Sched::ILP); in X86TargetLowering()
12489 your code has enough easily exploitable ILP to allow the compiler to
11861 enough easily exploitable ILP to allow the compiler to schedule
9464 C782;C782;110B 1175 11B5;C782;110B 1175 11B5; # (잂; 잂; 잂; 잂; 잂; ) HANGUL SYLLABLE ILP