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Searched refs:FSINCOS (Results 1 – 19 of 19) sorted by relevance

/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h959 FSINCOS, enumerator
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp206 case ISD::FSINCOS: return "fsincos"; in getOperationName()
H A DLegalizeDAG.cpp2241 if (User->getOpcode() == OtherOpcode || User->getOpcode() == ISD::FSINCOS) in useSinCos()
3233 if ((TLI.isOperationLegalOrCustom(ISD::FSINCOS, VT) || in ExpandNode()
3237 Tmp1 = DAG.getNode(ISD::FSINCOS, dl, VTs, Node->getOperand(0)); in ExpandNode()
4061 case ISD::FSINCOS: in ConvertNodeToLibcall()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86ScheduleAtom.td928 def : InstRW<[AtomWrite01_174], (instrs FSINCOS, FSIN, FCOS)>;
H A DX86InstrFPStack.td770 def FSINCOS : I<0xD9, MRM_FB, (outs), (ins), "fsincos", []>;
H A DX86ISelLowering.cpp573 setOperationAction(ISD::FSINCOS, VT, Action); in X86TargetLowering()
627 setOperationAction(ISD::FSINCOS, VT, Expand); in X86TargetLowering()
701 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in X86TargetLowering()
707 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in X86TargetLowering()
722 setOperationAction(ISD::FSINCOS, VT, Expand); in X86TargetLowering()
791 setOperationAction(ISD::FSINCOS, MVT::f80, Expand); in X86TargetLowering()
847 setOperationAction(ISD::FSINCOS, MVT::f128, LibCall); in X86TargetLowering()
899 setOperationAction(ISD::FSINCOS, VT, Expand); in X86TargetLowering()
2320 setOperationAction(ISD::FSINCOS, MVT::f64, Custom); in X86TargetLowering()
2321 setOperationAction(ISD::FSINCOS, MVT::f32, Custom); in X86TargetLowering()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1766 setOperationAction(ISD::FSINCOS, MVT::f128, Expand); in SparcTargetLowering()
1771 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in SparcTargetLowering()
1776 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in SparcTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp119 ISD::NodeType FPOpToExpand[] = {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, in CSKYTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp147 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in LoongArchTargetLowering()
163 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in LoongArchTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1589 {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, ISD::FSINCOS, in HexagonTargetLowering()
1638 ISD::FMINNUM, ISD::FMAXNUM, ISD::FSINCOS, in HexagonTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp423 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in MipsTargetLowering()
424 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in MipsTargetLowering()
H A DMipsSEISelLowering.cpp147 setOperationAction(ISD::FSINCOS, MVT::f16, Promote); in MipsSETargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp124 {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FMA}) in WebAssemblyTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp476 setOperationAction(ISD::FSINCOS, MVT::f128, Expand); in AArch64TargetLowering()
650 ISD::FCOS, ISD::FSIN, ISD::FSINCOS, in AArch64TargetLowering()
863 setOperationAction(ISD::FSINCOS, MVT::f64, Custom); in AArch64TargetLowering()
864 setOperationAction(ISD::FSINCOS, MVT::f32, Custom); in AArch64TargetLowering()
866 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in AArch64TargetLowering()
867 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in AArch64TargetLowering()
1404 setOperationAction(ISD::FSINCOS, VT, Expand); in AArch64TargetLowering()
5959 case ISD::FSINCOS: in LowerOperation()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp1442 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in ARMTargetLowering()
1443 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in ARMTargetLowering()
1485 setOperationAction(ISD::FSINCOS, MVT::f64, Custom); in ARMTargetLowering()
1486 setOperationAction(ISD::FSINCOS, MVT::f32, Custom); in ARMTargetLowering()
1524 setOperationAction(ISD::FSINCOS, MVT::f16, Promote); in ARMTargetLowering()
10511 case ISD::FSINCOS: return LowerFSINCOS(Op, DAG); in LowerOperation()
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp326 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, in RISCVTargetLowering()
369 ISD::FCOS, ISD::FSIN, ISD::FSINCOS, ISD::FEXP, in RISCVTargetLowering()
730 setOperationAction(ISD::FSINCOS, VT, Expand); in RISCVTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp385 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in PPCTargetLowering()
390 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in PPCTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp471 setOperationAction(ISD::FSINCOS, VT, Expand); in SystemZTargetLowering()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp10142 case ISD::FSINCOS: in isCanonicalized()