| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64GenRegisterBankInfo.def | 16 // 0: FPR 16-bit value. 18 // 1: FPR 32-bit value. 20 // 2: FPR 64-bit value. 22 // 3: FPR 128-bit value. 24 // 4: FPR 256-bit value. 26 // 5: FPR 512-bit value. 43 // 1: FPR 16-bit value. <-- This must match First3OpsIdx. 47 // 4: FPR 32-bit value. <-- This must match First3OpsIdx. 51 // 7: FPR 64-bit value. 55 // 10: FPR 128-bit value. [all …]
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| H A D | AArch64RegisterBanks.td | 16 def FPRRegBank : RegisterBank<"FPR", [QQQQ]>;
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64RegisterBankInfo.cpp | 131 CHECK_VALUEMAP(FPR, 16); in AArch64RegisterBankInfo() 132 CHECK_VALUEMAP(FPR, 32); in AArch64RegisterBankInfo() 133 CHECK_VALUEMAP(FPR, 64); in AArch64RegisterBankInfo() 134 CHECK_VALUEMAP(FPR, 128); in AArch64RegisterBankInfo() 135 CHECK_VALUEMAP(FPR, 256); in AArch64RegisterBankInfo() 136 CHECK_VALUEMAP(FPR, 512); in AArch64RegisterBankInfo() 150 CHECK_VALUEMAP_3OPS(FPR, 32); in AArch64RegisterBankInfo() 151 CHECK_VALUEMAP_3OPS(FPR, 64); in AArch64RegisterBankInfo() 152 CHECK_VALUEMAP_3OPS(FPR, 128); in AArch64RegisterBankInfo() 153 CHECK_VALUEMAP_3OPS(FPR, 256); in AArch64RegisterBankInfo() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCGenRegisterBankInfo.def | 21 // 2: FPR 32-bit value 23 // 3: FPR 64-bit value 52 // 7: FPR 32-bit value. 56 // 10: FPR 64-bit value.
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| /openbsd-src/gnu/gcc/gcc/config/s390/ |
| H A D | s390.md | 214 (define_mode_macro FPR [TF DF SF]) 256 ;; In FPR templates, a string like "lt<de>br" will expand to "ltxbr" in TFmode, 260 ;; In FPR templates, a string like "m<dee>br" will expand to "mxbr" in TFmode, 264 ;; In FPR templates, "<RRe>" will expand to "RRE" in TFmode and "RR" otherwise. 269 ;; In FPR templates, "<Rf>" will expand to "f" in TFmode and "R" otherwise. 354 (compare:CC (match_operand:FPR 0 "register_operand" "") 355 (match_operand:FPR 1 "general_operand" "")))] 745 (compare (match_operand:FPR 0 "register_operand" "f") 746 (match_operand:FPR 1 "const0_operand" "")))] 755 (compare (match_operand:FPR 0 "register_operand" "f") [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZMachineFunctionInfo.h | 76 void setVarArgsFirstFPR(Register FPR) { VarArgsFirstFPR = FPR; } in setVarArgsFirstFPR() argument
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| /openbsd-src/gnu/llvm/lldb/source/Plugins/Process/Utility/ |
| H A D | RegisterInfoPOSIX_riscv64.cpp | 23 sizeof(RegisterInfoPOSIX_riscv64::FPR)) 115 return sizeof(struct RegisterInfoPOSIX_riscv64::FPR); in GetFPRSize()
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| H A D | RegisterInfoPOSIX_loongarch64.cpp | 25 sizeof(RegisterInfoPOSIX_loongarch64::FPR)) 131 return sizeof(struct RegisterInfoPOSIX_loongarch64::FPR); in GetFPRSize()
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| H A D | RegisterInfoPOSIX_riscv64.h | 33 struct FPR { struct
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| H A D | RegisterContextPOSIX_loongarch64.h | 53 size_t GetFPRSize() { return sizeof(RegisterInfoPOSIX_loongarch64::FPR); } in GetFPRSize()
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| H A D | RegisterContextPOSIX_riscv64.h | 53 size_t GetFPRSize() { return sizeof(RegisterInfoPOSIX_riscv64::FPR); } in GetFPRSize()
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| H A D | RegisterInfoPOSIX_loongarch64.h | 40 struct FPR { struct
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| H A D | RegisterInfos_ppc64le.h | 15 #define FPR_OFFSET(regname) (offsetof(FPR, regname) + sizeof(GPR)) 16 #define VMX_OFFSET(regname) (offsetof(VMX, regname) + sizeof(GPR) + sizeof(FPR)) 18 (offsetof(VSX, regname) + sizeof(GPR) + sizeof(FPR) + sizeof(VMX)) 350 } FPR; typedef
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| H A D | RegisterInfos_i386.h | 28 LLVM_EXTENSION offsetof(FPR, fxsave) + \ 34 LLVM_EXTENSION offsetof(FPR, xsave) + \ 39 LLVM_EXTENSION offsetof(FPR, xsave) + \
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| H A D | RegisterContextOpenBSD_x86_64.cpp | 55 FPR fpr;
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| H A D | RegisterInfos_powerpc.h | 13 #define FPR_OFFSET(regname) (sizeof(GPR) + offsetof(FPR, regname)) 14 #define VMX_OFFSET(regname) (sizeof(GPR) + sizeof(FPR) + offsetof(VMX, regname))
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| /openbsd-src/gnu/llvm/lldb/source/Plugins/Process/Linux/ |
| H A D | NativeRegisterContextLinux_x86_64.cpp | 220 #define REG_CONTEXT_SIZE (GetRegisterInfoInterface().GetGPRSize() + sizeof(FPR)) 289 return sizeof(FPR); in GetXSTATESize() 293 return sizeof(FPR); in GetXSTATESize() 294 return std::max<std::size_t>(ecx, sizeof(FPR)); in GetXSTATESize() 363 m_xstate.reset(static_cast<FPR *>(std::malloc(xstate_size))); in NativeRegisterContextLinux_x86_64() 534 assert((reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(FPR)); in ReadRegister() 650 sizeof(FPR)); in WriteRegister() 747 ::memcpy(dst, m_xstate.get(), sizeof(FPR)); in ReadAllRegisterValues()
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| H A D | NativeRegisterContextLinux_loongarch64.h | 77 RegisterInfoPOSIX_loongarch64::FPR m_fpr;
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| H A D | NativeRegisterContextLinux_riscv64.h | 76 RegisterInfoPOSIX_riscv64::FPR m_fpr;
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| /openbsd-src/gnu/llvm/llvm/docs/GlobalISel/ |
| H A D | GMIR.rst | 108 registers) and FPR (floating point registers). 111 has to happen in FPR and G_ADD has to happen in GPR. However, even though this 113 happen in both GPR and FPR, and which we want depends on who is going to consume 114 the loaded data. Similarly, G_FNEG can happen in both GPR and FPR. If we assign 115 it to FPR, then we'll use floating point negation. However, if we assign it to 126 AArch64 has three main banks. GPR for integer operations, FPR for floating
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCRegisterBanks.td | 17 def FPRRegBank : RegisterBank<"FPR", [VSSRC]>;
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| /openbsd-src/regress/lib/libcrypto/x509/bettertls/certificates/ |
| H A D | 2436.key | 25 FPR/m6wqdhwKPUtg7/hQfZWYl9Bw2v/GVEAITldaXxQuw+UdGpnvVLV8eWLX3TPu
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| /openbsd-src/gnu/usr.bin/binutils-2.17/gas/config/ |
| H A D | m68k-parse.y | 105 %token <reg> DR AR FPR FPCR LPC ZAR ZDR LZPC CREG 163 | FPR 660 | FPR 859 return FPR; in yylex()
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| /openbsd-src/gnu/usr.bin/binutils/gas/config/ |
| H A D | m68k-parse.y | 103 %token <reg> DR AR FPR FPCR LPC ZAR ZDR LZPC CREG 136 | FPR 633 | FPR 830 return FPR; in yylex()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsRegisterInfo.td | 50 class FPR<bits<16> Enc, string n> : MipsReg<Enc, n>; 158 def F#I : FPR<I, "f"#I>, DwarfRegNum<[!add(I, 32)]>; 162 def F_HI#I : FPR<I, "f"#I>, DwarfRegNum<[!add(I, 32)]>; 168 [!cast<FPR>("F"#!shl(I, 1)), 169 !cast<FPR>("F"#!add(!shl(I, 1), 1))]>; 173 def D#I#_64 : AFPR64<I, "f"#I, [!cast<FPR>("F"#I), !cast<FPR>("F_HI"#I)]>,
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