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Searched refs:FDIV (Results 1 – 25 of 60) sorted by relevance

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/openbsd-src/gnu/usr.bin/binutils-2.17/opcodes/
H A Dm88k-dis.c200 …{0x84007000,"fdiv.sss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {30,30,PFLT,FDIV ,0,1,1,1,0…
201 …{0x84007080,"fdiv.ssd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
202 …{0x84007200,"fdiv.sds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
203 …{0x84007280,"fdiv.sdd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
204 …{0x84007020,"fdiv.dss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
205 …{0x840070a0,"fdiv.dsd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
206 …{0x84007220,"fdiv.dds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
207 …{0x840072a0,"fdiv.ddd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
/openbsd-src/gnu/usr.bin/binutils/opcodes/
H A Dm88k-dis.c205 …{0x84007000,"fdiv.sss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {30,30,PFLT,FDIV ,0,1,1,1,0…
206 …{0x84007080,"fdiv.ssd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
207 …{0x84007200,"fdiv.sds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
208 …{0x84007280,"fdiv.sdd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
209 …{0x84007020,"fdiv.dss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
210 …{0x840070a0,"fdiv.dsd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
211 …{0x84007220,"fdiv.dds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
212 …{0x840072a0,"fdiv.ddd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {60,60,PFLT,FDIV ,0,1,1,1,0…
/openbsd-src/gnu/gcc/gcc/config/sh/
H A Dsh4a.md188 ;; Single-precision FDIV/FSQRT
213 ;; Double precision FDIV/SQRT
H A Dsh4.md411 ;; Single Precision FDIV/SQRT
413 ;; Latency: 12/13 (FDIV); 11/12 (FSQRT)
453 ;; Double precision FDIV/SQRT
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp904 { ISD::FDIV, MVT::f64, { 4, 14, 1, 1 } }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
905 { ISD::FDIV, MVT::v2f64, { 4, 14, 1, 1 } }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
906 { ISD::FDIV, MVT::v4f64, { 8, 14, 1, 1 } }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
907 { ISD::FDIV, MVT::v8f64, { 16, 23, 1, 3 } }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
919 { ISD::FDIV, MVT::f32, { 3, 11, 1, 1 } }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
920 { ISD::FDIV, MVT::v4f32, { 3, 11, 1, 1 } }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
921 { ISD::FDIV, MVT::v8f32, { 5, 11, 1, 1 } }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
922 { ISD::FDIV, MVT::v16f32, { 10, 18, 1, 3 } }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
1019 { ISD::FDIV, MVT::f32, { 18, 19, 1, 1 } }, // divss in getArithmeticInstrCost()
1020 { ISD::FDIV, MVT::v4f32, { 35, 36, 1, 1 } }, // divps in getArithmeticInstrCost()
[all …]
H A DX86IntrinsicsInfo.h455 X86_INTRINSIC_DATA(avx512_div_pd_512, INTR_TYPE_2OP, ISD::FDIV, X86ISD::FDIV_RND),
456 X86_INTRINSIC_DATA(avx512_div_ps_512, INTR_TYPE_2OP, ISD::FDIV, X86ISD::FDIV_RND),
1005 X86_INTRINSIC_DATA(avx512fp16_div_ph_512, INTR_TYPE_2OP, ISD::FDIV, X86ISD::FDIV_RND),
/openbsd-src/gnu/usr.bin/binutils-2.17/include/opcode/
H A Dm88k.h345 #define FDIV NOP +4 macro
/openbsd-src/gnu/usr.bin/binutils/include/opcode/
H A Dm88k.h344 #define FDIV NOP +4 macro
/openbsd-src/gnu/llvm/llvm/lib/Target/VE/
H A DVVPNodes.def115 ADD_BINARY_VVP_OP_COMPACT(FDIV)
/openbsd-src/gnu/llvm/llvm/include/llvm/IR/
H A DConstrainedOps.def55 DAG_INSTRUCTION(FDiv, 2, 1, experimental_constrained_fdiv, FDIV)
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h393 FDIV, enumerator
/openbsd-src/gnu/usr.bin/gcc/gcc/config/alpha/
H A Dev4.md23 ; category. ABOX, BBOX, EBOX, FBOX, IMUL & FDIV make up the second.
/openbsd-src/gnu/gcc/gcc/config/alpha/
H A Dev4.md23 ; category. ABOX, BBOX, EBOX, FBOX, IMUL & FDIV make up the second.
/openbsd-src/gnu/usr.bin/binutils-2.17/gas/doc/
H A Dc-pdp11.texi100 @code{FADD}, @code{FDIV}, @code{FMUL}, and @code{FSUB}.
/openbsd-src/gnu/usr.bin/binutils/gas/doc/
H A Dc-pdp11.texi100 @code{FADD}, @code{FDIV}, @code{FMUL}, and @code{FSUB}.
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.h555 void visitFDiv(const User &I) { visitBinary(I, ISD::FDIV); } in visitFDiv()
H A DSelectionDAGDumper.cpp268 case ISD::FDIV: return "fdiv"; in getOperationName()
H A DLegalizeFloatTypes.cpp85 case ISD::FDIV: R = SoftenFloatRes_FDIV(N); break; in SoftenFloatResult()
1230 case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break; in ExpandFloatResult()
2279 case ISD::FDIV: in PromoteFloatResult()
2645 case ISD::FDIV: in SoftPromoteHalfResult()
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMicroMipsInstrFPU.td36 defm FDIV : ADDS_MMM<"div.d", II_DIV_D, 0, fdiv>,
H A DMipsSEISelLowering.cpp132 setOperationAction(ISD::FDIV, MVT::f16, Promote); in MipsSETargetLowering()
382 setOperationAction(ISD::FDIV, Ty, Legal); in addMSAFloatType()
1859 return DAG.getNode(ISD::FDIV, DL, Op->getValueType(0), Op->getOperand(1), in lowerINTRINSIC_WO_CHAIN()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetTransformInfo.cpp606 case ISD::FDIV: in getArithmeticInstrCost()
/openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF1.td125 defm FDIV : FT_XYZ<0b011000, "fdiv", BinOpFrag<(fdiv node:$LHS, node:$RHS)>>;
/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1862 setOperationAction(ISD::FDIV, MVT::f128, Legal); in SparcTargetLowering()
1887 setOperationAction(ISD::FDIV, MVT::f128, Custom); in SparcTargetLowering()
1939 setOperationAction(ISD::FDIV, MVT::f32, Promote); in SparcTargetLowering()
3234 case ISD::FDIV: return LowerF128Op(Op, DAG, in LowerOperation()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64SchedCyclone.td553 // FDIV,FSQRT
H A DAArch64SchedA57.td474 // Note: These were simply duplicated from ASIMD FDIV because of missing documentation

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