Searched refs:DefCycle (Results 1 – 8 of 8) sorted by relevance
210 int DefCycle = getOperandCycle(DefClass, DefIdx); in getOperandLatency() local211 if (DefCycle == -1) in getOperandLatency()218 UseCycle = DefCycle - UseCycle + 1; in getOperandLatency()
75 const Instruction &I, const Cycle &DefCycle) const { in usesValueFromCycle()80 if (DefCycle.contains(I->getParent())) in usesValueFromCycle()
99 const MachineInstr &I, const MachineCycle &DefCycle) const { in usesValueFromCycle()107 if (DefCycle.contains(Def->getParent())) in usesValueFromCycle()
1303 int DefCycle = ItinData->getOperandCycle(DefClass, DefIdx); in hasLowDefLatency() local1304 return (DefCycle != -1 && DefCycle <= 1); in hasLowDefLatency()
1205 int DefCycle = Schedule.getCycle(&Phi); in isLoopCarried() local1216 return (LoopCycle > DefCycle) || (LoopStage <= DefStage); in isLoopCarried()
2622 unsigned DefCycle = cycleScheduled(DefSU); in isLoopCarried() local2635 return (LoopCycle > DefCycle) || (LoopStage <= DefStage); in isLoopCarried()
3898 int DefCycle; in getVLDMDefCycle() local3901 DefCycle = RegNo / 2 + 1; in getVLDMDefCycle()3903 ++DefCycle; in getVLDMDefCycle()3905 DefCycle = RegNo; in getVLDMDefCycle()3920 ++DefCycle; in getVLDMDefCycle()3923 DefCycle = RegNo + 2; in getVLDMDefCycle()3926 return DefCycle; in getVLDMDefCycle()3939 int DefCycle; in getLDMDefCycle() local3943 DefCycle = RegNo / 2; in getLDMDefCycle()3944 if (DefCycle < 1) in getLDMDefCycle()[all …]
463 bool usesValueFromCycle(const InstructionT &I, const CycleT &DefCycle) const;