Searched refs:CS0 (Results 1 – 6 of 6) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.cpp | 171 Reserved.set(Hexagon::CS0); // C12 in getReservedRegs()
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| H A D | HexagonRegisterInfo.td | 193 def CS0: Rc<12, "cs0", ["c12"]>, DwarfRegNum<[79]>;
213 def CS : Rcc<12, "c13:12", [CS0, CS1], ["cs1:0"]>, DwarfRegNum<[78]>;
560 (add LC0, SA0, LC1, SA1, P3_0, C5, C8, PC, UGP, GP, CS0, CS1,
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| H A D | HexagonInstrInfo.cpp | 1061 Register CSx = (Mx == Hexagon::M0 ? Hexagon::CS0 : Hexagon::CS1); in expandPostRAPseudo()
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| H A D | HexagonISelLowering.cpp | 335 .Case("cs0", Hexagon::CS0) in getRegisterByName()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 676 /* 12 */ CS0, CS1, UPCYCLELO, UPCYCLEHI, in DecodeCtrRegsRegisterClass()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/IPO/ |
| H A D | AttributorAttributes.cpp | 191 ChangeStatus CS0 = in PIPE_OPERATOR() local
194 return CS0 | CS1; in PIPE_OPERATOR()
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