| /openbsd-src/gnu/llvm/compiler-rt/lib/builtins/hexagon/ |
| H A D | fastmath2_ldlib_asm.S | 89 lmanta = ASR(lmanta, expa)
90 lmantb = ASR(lmantb, expb)
188 lmanta = ASR(lmanta, expa)
189 lmantb = ASR(lmantb, expb)
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| H A D | fastmath_dlib_asm.S | 104 lmanta = ASR(lmanta, expa)
105 lmantb = ASR(lmantb, expb)
239 lmanta = ASR(lmanta, expa)
240 lmantb = ASR(lmantb, expb)
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| H A D | fastmath2_dlib_asm.S | 96 lmanta = ASR(lmanta, expa)
97 lmantb = ASR(lmantb, expb)
197 lmanta = ASR(lmanta, expa)
198 lmantb = ASR(lmantb, expb)
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| H A D | dfdiv.S | 169 DIV_ITER1B(ASR,1,15,)
170 DIV_ITER1B(ASR,16,15,)
171 DIV_ITER1B(ASR,31,15,PROD=# ( 0 );)
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| H A D | dfaddsub.S | 117 BTMP = ASR(BTMP,EXPDIFF)
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| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kInstrShiftRotate.td | 15 /// SHL [~] ASR [~] LSR [~] SWAP [ ]
95 defm ASR : MxSROp<"asr", sra, MxRODI_R, MxROOP_AS>;
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| /openbsd-src/gnu/usr.bin/binutils-2.17/gas/ |
| H A D | bfin-parse.h | 151 ASR = 377, enumerator
326 #define ASR 377 macro
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| H A D | bfin-lex.c | 1847 return ASR;
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 37 ASR, enumerator
58 case AArch64_AM::ASR: return "asr"; in getShiftExtendName()
79 case 2: return AArch64_AM::ASR; in getShiftType()
107 case AArch64_AM::ASR: STEnc = 2; break; in getShifterImm()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.h | 48 ASR, ///< Arithmetic shift right. enumerator
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| H A D | AVRISelLowering.cpp | 258 NODE(ASR); in getTargetNodeName()
375 Opc8 = AVRISD::ASR; in LowerShifts()
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| /openbsd-src/gnu/llvm/lldb/source/Plugins/Process/Utility/ |
| H A D | ARMUtils.h | 156 static inline uint32_t ASR(const uint32_t value, const uint32_t amount, in ASR() function
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Utils/ |
| H A D | FunctionComparator.cpp | 710 unsigned int ASR = GEPR->getPointerAddressSpace(); in cmpGEPs() local
712 if (int Res = cmpNumbers(ASL, ASR)) in cmpGEPs()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedPredicates.td | 50 def CheckShiftASR : CheckImmOperand_s<3, "AArch64_AM::ASR">;
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| H A D | AArch64SchedNeoverseN2.td | 1602 (instregex "^(ASR|LSL|LSR)_WIDE_ZPmZ_[BHS]$",
1603 "^(ASR|LSL|LSR)_WIDE_ZZZ_[BHS]$",
1604 "^(ASR|LSL|LSR)_ZPmI_[BHSD]$",
1605 "^(ASR|LSL|LSR)_ZPmZ_[BHSD]$",
1606 "^(ASR|LSL|LSR)_ZZI_[BHSD]$",
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| H A D | AArch64FastISel.cpp | 1278 case Instruction::AShr: ShiftType = AArch64_AM::ASR; break; in emitAddSub()
3736 emitSubs_rs(VT, SMULHReg, MulReg, AArch64_AM::ASR, 63, in fastLowerIntrinsicCall()
4893 AArch64_AM::ASR, Lg2); in selectSDiv()
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| /openbsd-src/gnu/usr.bin/binutils-2.17/gas/config/ |
| H A D | bfin-lex.l | 227 [aA][sS][rR] return ASR;
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| H A D | bfin-parse.y | 466 %token ASL ASR
3504 | LPAREN ASR RPAREN
3537 | ASR
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 612 ASR, enumerator
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.td | 365 (add Y, (sequence "ASR%u", 1, 31))>;
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM7.td | 338 def : InstRW<[WriteALUsi], (instregex "(t|t2)(LSL|LSR|ASR|ROR)")>;
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| H A D | ARMInstrThumb.td | 1076 // ASR immediate
1087 // ASR register
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| H A D | ARMScheduleSwift.td | 154 // ASR,LSL,ROR,RRX
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| /openbsd-src/gnu/usr.bin/binutils-2.17/cpu/ |
| H A D | mt.cpu | 276 LSL LSR ASR - - - - -
845 (dni asr "ASR DstReg, SrcReg1, SrcReg2"
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1462 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR || in isShifter()
1557 ST == AArch64_AM::ASR) && getShiftExtendAmount() < width; in isArithmeticShifter()
1568 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR) && in isLogicalShifter()
3566 .Case("asr", AArch64_AM::ASR) in tryParseOptionalShiftExtend()
3589 ShOp == AArch64_AM::ASR || ShOp == AArch64_AM::ROR || in tryParseOptionalShiftExtend()
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