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Searched refs:shift1 (Results 1 – 25 of 34) sorted by relevance

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/netbsd-src/common/lib/libc/arch/or1k/string/
H A Dmemcpy.c40 combine_words(unsigned long w1, unsigned long w2, int shift1, int shift2) in combine_words() argument
43 return (w1 << shift1) | (w2 >> shift2); in combine_words()
45 return (w1 >> shift1) | (w2 << shift2); in combine_words()
90 const int shift1 = offset * 8; in memcpy() local
91 const int shift2 = sizeof(*la) * 8 - shift1; in memcpy()
100 la[0] = combine_words(w1, w2, shift1, shift2); in memcpy()
104 la[1] = combine_words(w2, w1, shift1, shift2); in memcpy()
108 la[2] = combine_words(w1, w2, shift1, shift2); in memcpy()
112 la[3] = combine_words(w2, w1, shift1, shift2); in memcpy()
121 *la++ = combine_words(w1, w2, shift1, shift2); in memcpy()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
H A Damdgpu_dc_helper.c133 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in set_reg_field_values() argument
141 field_value1, mask1, shift1); in set_reg_field_values()
250 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in generic_reg_update_ex() argument
259 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in generic_reg_update_ex()
278 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in generic_reg_set_ex() argument
286 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in generic_reg_set_ex()
340 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get2() argument
344 *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); in generic_reg_get2()
350 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get3() argument
355 *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); in generic_reg_get3()
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H A Ddm_services.h141 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
145 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/src/
H A Damdgpu_dmub_reg.c49 uint32_t addr, int n, uint8_t shift1, in set_reg_field_values() argument
58 shift1); in set_reg_field_values()
77 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, in dmub_reg_update() argument
85 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in dmub_reg_update()
95 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) in dmub_reg_set() argument
101 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in dmub_reg_set()
H A Ddmub_reg.h118 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
120 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1,
/netbsd-src/external/gpl3/gcc/dist/libgcc/config/arm/
H A Dieee754-df.S98 shift1 lsl, r4, xh, #1
99 shift1 lsl, r5, yh, #1
112 shift1 lsr, r4, r4, #21
605 shift1 lsl, ip, xl, r3
606 shift1 lsr, xl, xl, r2
608 shift1 lsr, xh, xh, r2
754 shift1 lsl, r3, xl, r5
755 shift1 lsr, xl, xl, r4
770 shift1 lsl, r3, xl, r4
771 shift1 lsr, xl, xl, r5
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H A Dieee754-sf.S126 shift1 lsl, r1, r1, r3
202 shift1 lsl, r0, r0, ip
406 shift1 lsl, ip, al, r2
415 shift1 lsl, ip, ah, r2
536 shift1 lsr, r1, r1, r2
538 shift1 lsl, ip, r0, r2
1038 shift1 lsr, r0, r3, r2
1082 shift1 lsr, r0, r3, r2
H A Dlib1funcs.S224 .macro shift1 op, arg0, arg1, arg2 macro
238 .macro shift1 op, arg0, arg1, arg2 macro
/netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/arm/
H A Dieee754-df.S98 shift1 lsl, r4, xh, #1
99 shift1 lsl, r5, yh, #1
112 shift1 lsr, r4, r4, #21
605 shift1 lsl, ip, xl, r3
606 shift1 lsr, xl, xl, r2
608 shift1 lsr, xh, xh, r2
754 shift1 lsl, r3, xl, r5
755 shift1 lsr, xl, xl, r4
770 shift1 lsl, r3, xl, r4
771 shift1 lsr, xl, xl, r5
[all …]
H A Dieee754-sf.S126 shift1 lsl, r1, r1, r3
202 shift1 lsl, r0, r0, ip
406 shift1 lsl, ip, al, r2
415 shift1 lsl, ip, ah, r2
536 shift1 lsr, r1, r1, r2
538 shift1 lsl, ip, r0, r2
1038 shift1 lsr, r0, r3, r2
1082 shift1 lsr, r0, r3, r2
H A Dlib1funcs.S224 .macro shift1 op, arg0, arg1, arg2 macro
238 .macro shift1 op, arg0, arg1, arg2 macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/
H A Dreg_helper.h397 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
401 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
406 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
412 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
419 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
427 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
436 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
494 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
500 uint8_t shift1, uint32_t mask1, uint32_t field_value1,
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/h8300/
H A Dh8300.c3910 const char *shift1; member
3985 info->shift1 = shift_one[cpu_type][shift_type][shift_mode].assembler; in get_shift_alg()
3991 info->shift1 = rotate_one[cpu_type][shift_type][shift_mode]; in get_shift_alg()
3999 info->shift1 = shift_one[cpu_type][shift_type][shift_mode].assembler; in get_shift_alg()
4052 info->shift1 = "shlr.b\t%s0"; in get_shift_alg()
4065 info->shift1 = "shar.b\t%s0"; in get_shift_alg()
4129 info->shift1 = "shlr\t%y0\n\trotxr\t%x0\n\trotxr\t%w0"; in get_shift_alg()
4192 info->shift1 = "add.w\t%e0,%e0"; in get_shift_alg()
4198 info->shift1 = "shlr\t%x0\n\trotxr\t%w0"; in get_shift_alg()
4210 info->shift1 = "shar\t%x0\n\trotxr\t%w0"; in get_shift_alg()
[all …]
/netbsd-src/external/gpl3/gcc/dist/gcc/config/h8300/
H A Dh8300.cc3623 const char *shift1; member
3694 info->shift1 = shift_one[cpu_type][shift_type][shift_mode].assembler; in get_shift_alg()
3700 info->shift1 = rotate_one[cpu_type][shift_type][shift_mode]; in get_shift_alg()
3708 info->shift1 = shift_one[cpu_type][shift_type][shift_mode].assembler; in get_shift_alg()
4135 output_asm_insn (info.shift1, operands); in output_a_shift()
4148 gcc_assert (info.shift1); in output_a_shift()
4159 output_asm_insn (info.shift1, operands); in output_a_shift()
4192 output_asm_insn (info.shift1, operands); in output_a_shift()
4199 output_asm_insn (info.shift1, operands); in output_a_shift()
4270 return (4 + h8300_asm_insn_count (info.shift1)) * 2; in compute_a_shift_length()
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/netbsd-src/external/gpl3/binutils.old/dist/gold/
H A Ddynobj.cc1229 uint32_t shift1; in sized_create_gnu_hash_table() local
1231 shift1 = 5; in sized_create_gnu_hash_table()
1236 shift1 = 6; in sized_create_gnu_hash_table()
1238 uint32_t mask = (1U << shift1) - 1U; in sized_create_gnu_hash_table()
1241 uint32_t maskwords = 1U << (maskbitslog2 - shift1); in sized_create_gnu_hash_table()
1285 unsigned int val = ((hashval >> shift1) in sized_create_gnu_hash_table()
1286 & ((maskbits >> shift1) - 1)); in sized_create_gnu_hash_table()
/netbsd-src/external/gpl3/binutils/dist/gold/
H A Ddynobj.cc1229 uint32_t shift1; in sized_create_gnu_hash_table() local
1231 shift1 = 5; in sized_create_gnu_hash_table()
1236 shift1 = 6; in sized_create_gnu_hash_table()
1238 uint32_t mask = (1U << shift1) - 1U; in sized_create_gnu_hash_table()
1241 uint32_t maskwords = 1U << (maskbitslog2 - shift1); in sized_create_gnu_hash_table()
1285 unsigned int val = ((hashval >> shift1) in sized_create_gnu_hash_table()
1286 & ((maskbits >> shift1) - 1)); in sized_create_gnu_hash_table()
/netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/ia64/
H A Dunwind-ia64.c1506 unw_word shift1, shift2; in ia64_copy_rbs() local
1515 shift1 = ((dst - src) >> 3) & 0x3f; in ia64_copy_rbs()
1517 shift1--; in ia64_copy_rbs()
1518 shift2 = 0x3f - shift1; in ia64_copy_rbs()
1540 dst_rnat |= (src_rnat << shift1) & ~(1ULL << 63); in ia64_copy_rbs()
1546 count = shift1 << 3; in ia64_copy_rbs()
/netbsd-src/external/gpl3/gcc/dist/libgcc/config/ia64/
H A Dunwind-ia64.c1506 unw_word shift1, shift2; in ia64_copy_rbs() local
1515 shift1 = ((dst - src) >> 3) & 0x3f; in ia64_copy_rbs()
1517 shift1--; in ia64_copy_rbs()
1518 shift2 = 0x3f - shift1; in ia64_copy_rbs()
1540 dst_rnat |= (src_rnat << shift1) & ~(1ULL << 63); in ia64_copy_rbs()
1546 count = shift1 << 3; in ia64_copy_rbs()
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/tilepro/
H A Dgen-mul-tables.cc309 Operator ("CODE_FOR_ashlsi3", "shli", shift1, 1, 1001),
351 Operator ("CODE_FOR_ashldi3", "shli", shift1, 1, 1001),
/netbsd-src/external/gpl3/gcc/dist/gcc/config/tilepro/
H A Dgen-mul-tables.cc309 Operator ("CODE_FOR_ashlsi3", "shli", shift1, 1, 1001),
351 Operator ("CODE_FOR_ashldi3", "shli", shift1, 1, 1001),
/netbsd-src/external/gpl3/gcc/dist/libstdc++-v3/include/tr1/
H A Drandom.h1314 static const int shift1 = __s1; in _GLIBCXX_VISIBILITY()
1373 return ((result_type(_M_b1() - _M_b1.min()) << shift1) in _GLIBCXX_VISIBILITY()
/netbsd-src/external/gpl3/gcc.old/dist/libstdc++-v3/include/tr1/
H A Drandom.h1314 static const int shift1 = __s1; in _GLIBCXX_VISIBILITY()
1373 return ((result_type(_M_b1() - _M_b1.min()) << shift1) in _GLIBCXX_VISIBILITY()
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/i386/
H A Dx86-tune.def498 DEF_TUNE (X86_TUNE_SHIFT1, "shift1", ~m_486)
/netbsd-src/external/gpl3/gcc/dist/gcc/config/i386/
H A Dx86-tune.def591 DEF_TUNE (X86_TUNE_SHIFT1, "shift1", ~m_486)
/netbsd-src/external/gpl3/binutils/dist/bfd/
H A Delflink.c6261 long int shift1, shift2; member
6351 val = (s->hashval[h->dynindx] >> s->shift1) in elf_gnu_hash_process_symidx()
6352 & ((s->maskbits >> s->shift1) - 1); in elf_gnu_hash_process_symidx()
7813 cinfo.shift1 = 6; in bfd_elf_size_dynsym_hash_dynstr()
7816 cinfo.shift1 = 5; in bfd_elf_size_dynsym_hash_dynstr()
7817 cinfo.mask = (1 << cinfo.shift1) - 1; in bfd_elf_size_dynsym_hash_dynstr()
7820 maskwords = 1 << (maskbitslog2 - cinfo.shift1); in bfd_elf_size_dynsym_hash_dynstr()

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