Home
last modified time | relevance | path

Searched refs:setImm (Results 1 – 25 of 83) sorted by relevance

1234

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DR600ClauseMergePass.cpp102 CFAlu.getOperand(CntIdx).setImm(getCFAluSize(CFAlu) + getCFAluSize(MI)); in cleanPotentialDisabledCFAlu()
153 RootCFAlu.getOperand(Mode0Idx).setImm( in mergeIfPossible()
155 RootCFAlu.getOperand(KBank0Idx).setImm( in mergeIfPossible()
158 .setImm(LatrCFAlu.getOperand(KBank0LineIdx).getImm()); in mergeIfPossible()
161 RootCFAlu.getOperand(Mode1Idx).setImm( in mergeIfPossible()
163 RootCFAlu.getOperand(KBank1Idx).setImm( in mergeIfPossible()
166 .setImm(LatrCFAlu.getOperand(KBank1LineIdx).getImm()); in mergeIfPossible()
168 RootCFAlu.getOperand(CntIdx).setImm(CumuledInsts); in mergeIfPossible()
H A DR600InstrInfo.cpp750 PredSet->getOperand(2).setImm(Cond[1].getImm()); in insertBranch()
766 PredSet->getOperand(2).setImm(Cond[1].getImm()); in insertBranch()
914 MO.setImm(R600::PRED_SETNE_INT); in reverseBranchCondition()
917 MO.setImm(R600::PRED_SETE_INT); in reverseBranchCondition()
920 MO.setImm(R600::PRED_SETNE); in reverseBranchCondition()
923 MO.setImm(R600::PRED_SETE); in reverseBranchCondition()
954 MI.getOperand(8).setImm(0); in PredicateInstruction()
1338 MIB->getOperand(20).setImm(0); in buildSlotOfVectorInstruction()
1371 MI.getOperand(Idx).setImm(Imm); in setImmOperand()
1456 FlagOp.setImm(1); in addFlag()
[all …]
H A DR600Packetizer.cpp218 MI->getOperand(LastOp).setImm(Bit); in setIsLastBit()
299 MI->getOperand(Op).setImm(BS[i]); in addToPacket()
303 MI.getOperand(Op).setImm(BS.back()); in addToPacket()
H A DR600ControlFlowFinalizer.cpp433 ClauseHead.getOperand(7).setImm(ClauseContent.size() - 1); in MakeALUClause()
451 Clause.first->getOperand(0).setImm(0); in EmitALUClause()
462 MI.getOperand(0).setImm(Addr + MI.getOperand(0).getImm()); in CounterPropagateAddr()
606 IfOrElseInst->getOperand(1).setImm(1); in runOnMachineFunction()
H A DSIShrinkInstructions.cpp378 SrcImm->setImm(NewImm); in shrinkScalarLogicOp()
628 Src.setImm(ReverseImm); in runOnMachineFunction()
695 Src.setImm(ReverseImm); in runOnMachineFunction()
H A DSIPeepholeSDWA.cpp406 SrcSel->setImm(getSrcSel()); in convertToSDWA()
407 SrcMods->setImm(getSrcMods(TII, Src)); in convertToSDWA()
451 DstSel->setImm(getDstSel()); in convertToSDWA()
454 DstUnused->setImm(getDstUnused()); in convertToSDWA()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegisterInfo.cpp82 MI.getOperand(OffsetOperandNum).setImm(Offset); in eliminateFrameIndex()
105 ImmMO.setImm(ImmMO.getImm() + uint32_t(FrameOffset)); in eliminateFrameIndex()
H A DWebAssemblySetP2AlignOperands.cpp74 MI.getOperand(OperandNo).setImm(P2Align); in rewriteP2Align()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86EvexToVex.cpp163 Imm.setImm(Imm.getImm() * Scale); in performCustomAdjustments()
180 Imm.setImm(0x20 | ((ImmVal & 2) << 3) | (ImmVal & 1)); in performCustomAdjustments()
H A DX86InstrInfo.h165 I.getOperand(2).setImm(V); in setFrameAdjustment()
167 I.getOperand(1).setImm(V); in setFrameAdjustment()
H A DX86InstrBuilder.h136 MI->getOperand(Operand + 1).setImm(1); in setDirectAddressInInstr()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCMIPeephole.cpp591 MI.getOperand(3).setImm(3 - Immed); in simplifyCode()
680 MI.getOperand(2).setImm(NewElem); in simplifyCode()
1450 BI1->getOperand(0).setImm(NewPredicate1); in eliminateRedundantCompare()
1453 BI2->getOperand(0).setImm(NewPredicate2); in eliminateRedundantCompare()
1456 CMPI1->getOperand(2).setImm(NewImm1); in eliminateRedundantCompare()
1469 CMPI2->getOperand(2).setImm(NewImm2); in eliminateRedundantCompare()
1566 MI.getOperand(2).setImm(NewSH); in emitRLDICWhenLoweringJumpTables()
1567 MI.getOperand(3).setImm(NewMB); in emitRLDICWhenLoweringJumpTables()
H A DPPCVSXSwapRemoval.cpp870 MI->getOperand(2).setImm(EltNo); in handleSpecialSwappables()
872 MI->getOperand(1).setImm(EltNo); in handleSpecialSwappables()
894 MI->getOperand(3).setImm(Selector); in handleSpecialSwappables()
H A DPPCInstrInfo.cpp1221 MI.getOperand(4).setImm((ME + 1) & 31); in commuteInstructionImpl()
1222 MI.getOperand(5).setImm((MB - 1) & 31); in commuteInstructionImpl()
2030 Cond[0].setImm(Cond[0].getImm() == 0 ? 1 : 0); in reverseBranchCondition()
2033 Cond[0].setImm(PPC::InvertPredicate((PPC::Predicate)Cond[0].getImm())); in reverseBranchCondition()
2691 MI->getOperand(2).setImm(Mask); in optimizeCompareInstr()
2700 MI->getOperand(2).setImm(Mask); in optimizeCompareInstr()
2728 PredsToUpdate[i].first->setImm(PredsToUpdate[i].second); in optimizeCompareInstr()
3506 ADDIMI->getOperand(2).setImm(OffsetAddi + OffsetImm); in foldFrameOffset()
3773 MI.getOperand(2).setImm(0); in combineRLWINM()
3798 MI.getOperand(2).setImm(NewSH); in combineRLWINM()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64StackTaggingPreRA.cpp335 TagOp.setImm(0); in findFirstSlotCandidate()
337 TagOp.setImm(MaxScoreST.Tag); in findFirstSlotCandidate()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZShortenInst.cpp102 MI.getOperand(1).setImm(Imm >> 16); in shortenIIF()
373 ImmMO.setImm(ImmMO.getImm() & 0xfff); in processBlock()
H A DSystemZInstrInfo.cpp98 LowOffsetOp.setImm(LowOffsetOp.getImm() + 8); in splitMove()
128 OffsetMO.setImm(Offset); in splitAdjDynAlloc()
144 MI.getOperand(1).setImm(uint32_t(MI.getOperand(1).getImm())); in expandRIPseudo()
295 WorkingMI.getOperand(4).setImm(CCMask ^ CCValid); in commuteInstructionImpl()
473 Cond[1].setImm(Cond[1].getImm() ^ Cond[0].getImm()); in reverseBranchCondition()
1494 MI.getOperand(5).setImm(MI.getOperand(5).getImm() ^ 32); in expandPostRAPseudo()
1866 CCMaskMO.setImm(NewCCMask); in prepareCompareSwapOperands()
H A DSystemZElimCompare.cpp461 AlterMasks[I]->setImm(CCValues); in adjustCCMasksForInstr()
473 AlterMasks[I + 1]->setImm(CCMask); in adjustCCMasksForInstr()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMMCInstLower.cpp161 MCOp.setImm(Enc); in LowerARMMachineInstrToMCInst()
H A DMVEVPTBlockPass.cpp219 Iter->getOperand(OpIdx).setImm(CurrentPredicate); in CreateVPTBlock()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/
H A DMCInst.h85 void setImm(int64_t Val) { in setImm() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp202 Op.setImm(Make_64(Hi, Op.getImm())); in getInstruction()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonVExtract.cpp187 Op.setImm(MaxAlign->value()); in runOnMachineFunction()
H A DHexagonVLIWPacketizer.cpp493 Off.setImm(NewOff); in useCallersSP()
512 Off.setImm(Off.getImm() + FrameSize + HEXAGON_LRFP_SIZE); in useCalleesSP()
546 MI.getOperand(OPI).setImm(Offset + Incr); in updateOffset()
557 MI.getOperand(OP).setImm(ChangedOffset); in undoChangedOffset()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DMachineOperand.h655 void setImm(int64_t immVal) { in setImm() function
775 Op.setImm(Val); in CreateImm()

1234