Searched refs:regTypes (Results 1 – 9 of 9) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegisterInfo.td | 19 class WebAssemblyRegClass<list<ValueType> regTypes, int alignment, dag regList>
20 : RegisterClass<"WebAssembly", regTypes, alignment, regList>;
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXRegisterInfo.td | 17 class NVPTXRegClass<list<ValueType> regTypes, int alignment, dag regList>
18 : RegisterClass <"NVPTX", regTypes, alignment, regList>;
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kRegisterInfo.td | 85 class MxRegClass<list<ValueType> regTypes, int alignment, dag regList>
86 : RegisterClass<"M68k", regTypes, alignment, regList>;
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.td | 789 class VRegClassBase<int numRegs, list<ValueType> regTypes, dag regList> :
790 RegisterClass<"AMDGPU", regTypes, 32, regList> {
801 multiclass VRegClass<int numRegs, list<ValueType> regTypes, dag regList> {
803 def "" : VRegClassBase<numRegs, regTypes, regList>;
806 def _Align2 : VRegClassBase<numRegs, regTypes, (decimate regList, 2)>;
820 multiclass ARegClass<int numRegs, list<ValueType> regTypes, dag regList> {
823 def "" : VRegClassBase<numRegs, regTypes, regList>;
826 def _Align2 : VRegClassBase<numRegs, regTypes, (decimate regList, 2)>;
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.td | 460 class VReg<list<ValueType> regTypes, dag regList, int Vlmul>
462 regTypes,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsRegisterInfo.td | 281 class GPR32Class<list<ValueType> regTypes> :
282 RegisterClass<"Mips", regTypes, 32, (add
|
| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/ |
| H A D | Target.td | 215 class RegisterClass<string namespace, list<ValueType> regTypes, int alignment,
229 list<ValueType> RegTypes = regTypes;
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 3306 const char regTypes[] = { 'g', 'o', 'l', 'i' }; in getRegForInlineAsmConstraint() local
3307 char regType = regTypes[intVal/8]; in getRegForInlineAsmConstraint()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/docs/ |
| H A D | WritingAnLLVMBackend.rst | 484 list<ValueType> regTypes, int alignment, dag regList> {
486 list<ValueType> RegTypes = regTypes;
|