| /netbsd-src/sys/dev/pci/igc/ |
| H A D | igc_phy.c | 34 phy->ops.read_reg = igc_null_read_reg; in igc_init_phy_ops_generic() 148 if (!phy->ops.read_reg) in igc_get_phy_id() 151 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igc_get_phy_id() 157 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igc_get_phy_id() 303 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg); in igc_phy_setup_autoneg() 309 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, in igc_phy_setup_autoneg() 317 ret_val = phy->ops.read_reg(hw, (STANDARD_AN_REG_MASK << in igc_phy_setup_autoneg() 498 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); in igc_copper_link_autoneg() 617 if (!hw->phy.ops.read_reg) in igc_wait_autoneg() 622 ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status); in igc_wait_autoneg() [all …]
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| H A D | igc_mac.c | 599 ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &mii_status_reg); in igc_config_fc_after_link_up_generic() 602 ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &mii_status_reg); in igc_config_fc_after_link_up_generic() 615 ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV, in igc_config_fc_after_link_up_generic() 619 ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY, in igc_config_fc_after_link_up_generic()
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| H A D | igc_hw.h | 233 int (*read_reg)(struct igc_hw *, uint32_t, uint16_t *); member
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| H A D | igc_i225.c | 157 phy->ops.read_reg = igc_read_phy_reg_gpy; in igc_init_phy_params_i225()
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| H A D | if_igc.c | 3870 phy->ops.read_reg(hw, 0x1e, &phy_ver); in igc_print_devinfo()
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| /netbsd-src/sys/dev/pci/igma/ |
| H A D | igmafb.c | 385 r = co->read_reg(cd, PIPE_HTOTAL(pipe)); in igmafb_guess_size() 387 r = co->read_reg(cd, PIPE_VTOTAL(pipe)); in igmafb_guess_size() 395 r = co->read_reg(cd, PF_WINSZ(pipe)); in igmafb_guess_size() 424 r = co->read_reg(cd, sc->sc_chip.vga_cntrl); in igmafb_set_mode() 445 r = co->read_reg(cd, PRI_CTRL(pipe)); in igmafb_set_mode() 475 if ((co->read_reg(cd, PIPE_CONF(pipe)) & PIPE_CONF_STATE) == 0) in igmafb_set_mode() 480 r = co->read_reg(cd, 0x42000); in igmafb_set_mode() 482 r = co->read_reg(cd, 0x42004); in igmafb_set_mode() 492 r = co->read_reg(cd, sc->sc_chip.vga_cntrl); in igmafb_set_mode() 517 fwbcl = co->read_reg(cd, FW_BLC_SELF); in igmafb_planestart_quirk() [all …]
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| /netbsd-src/sys/arch/evbarm/stand/board/ |
| H A D | sscom.c | 187 #define read_reg(addr) (*(volatile uint32_t *)(addr)) macro 194 uint32_t pllcon = read_reg(S3C2800_CLKMAN_BASE+CLKMAN_PLLCON); in get_com_freq() 195 uint32_t div = read_reg(S3C2800_CLKMAN_BASE+CLKMAN_CLKCON); in get_com_freq() 200 uint32_t pllcon = read_reg(S3C2410_CLKMAN_BASE+CLKMAN_MPLLCON); in get_com_freq() 201 uint32_t div = read_reg(S3C2410_CLKMAN_BASE+CLKMAN_CLKDIVN); in get_com_freq()
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| /netbsd-src/sys/dev/pci/ixgbe/ |
| H A D | ixgbe_phy.c | 264 phy->ops.read_reg = ixgbe_read_phy_reg_generic; in ixgbe_init_phy_ops_generic() 310 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, in ixgbe_probe_phy() 416 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH, in ixgbe_validate_phy_addr() 440 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH, in ixgbe_get_phy_id() 446 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_LOW, in ixgbe_get_phy_id() 541 status = hw->phy.ops.read_reg(hw, in ixgbe_reset_phy_generic() 553 status = hw->phy.ops.read_reg(hw, in ixgbe_reset_phy_generic() 804 hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, in ixgbe_setup_phy_link_generic() 817 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic() 847 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG, in ixgbe_setup_phy_link_generic() [all …]
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| H A D | ixgbe_x550.c | 610 hw->phy.ops.read_reg = NULL; in ixgbe_identify_phy_fw() 2145 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG, in ixgbe_get_lasi_ext_t_x550em() 2154 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG, in ixgbe_get_lasi_ext_t_x550em() 2164 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_ALARM_1, in ixgbe_get_lasi_ext_t_x550em() 2178 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_FAULT_MSG, in ixgbe_get_lasi_ext_t_x550em() 2194 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG, in ixgbe_get_lasi_ext_t_x550em() 2202 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2, in ixgbe_get_lasi_ext_t_x550em() 2244 status = hw->phy.ops.read_reg(hw, in ixgbe_enable_lasi_ext_t_x550em() 2262 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK, in ixgbe_enable_lasi_ext_t_x550em() 2280 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK, in ixgbe_enable_lasi_ext_t_x550em() [all …]
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| H A D | ixgbe_82598.c | 621 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS, in ixgbe_validate_link_ready() 665 hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg); in ixgbe_check_mac_link_82598() 666 hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg); in ixgbe_check_mac_link_82598() 667 hw->phy.ops.read_reg(hw, 0xC00C, IXGBE_TWINAX_DEV, in ixgbe_check_mac_link_82598() 679 hw->phy.ops.read_reg(hw, 0xC79F, in ixgbe_check_mac_link_82598() 682 hw->phy.ops.read_reg(hw, 0xC00C, in ixgbe_check_mac_link_82598() 1249 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, in ixgbe_get_supported_physical_layer_82598()
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| H A D | ixgbe_common.c | 281 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, in ixgbe_setup_fc_generic() 628 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL, in ixgbe_clear_hw_cntrs_generic() 630 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH, in ixgbe_clear_hw_cntrs_generic() 632 hw->phy.ops.read_reg(hw, IXGBE_LDPCECL, in ixgbe_clear_hw_cntrs_generic() 634 hw->phy.ops.read_reg(hw, IXGBE_LDPCECH, in ixgbe_clear_hw_cntrs_generic() 3109 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, in ixgbe_fc_autoneg_copper() 3112 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_LP, in ixgbe_fc_autoneg_copper()
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| H A D | ixgbe_x540.c | 350 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, in ixgbe_get_supported_physical_layer_X540()
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| H A D | ixgbe_api.c | 540 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, in ixgbe_read_phy_reg()
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| H A D | ixgbe_82599.c | 2223 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, in ixgbe_get_supported_physical_layer_82599()
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| H A D | ixgbe_type.h | 4134 s32 (*read_reg)(struct ixgbe_hw *, u32, u32, u16 *); member
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| H A D | ixgbe.c | 5997 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP, in ixgbe_sysctl_phy_temp() 6041 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS, in ixgbe_sysctl_phy_overtemp_occurred()
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/ |
| H A D | dse.c | 1739 rtx read_reg = NULL; in find_shift_sequence() local 1844 read_reg = extract_low_bits (read_mode, new_mode, new_reg); in find_shift_sequence() 1848 return read_reg; in find_shift_sequence() 1877 rtx read_reg; in get_stored_val() local 1894 read_reg = find_shift_sequence (access_size, store_info, read_mode, in get_stored_val() 1904 read_reg = NULL_RTX; in get_stored_val() 1906 read_reg = extract_low_bits (read_mode, int_store_mode, const0_rtx); in get_stored_val() 1909 read_reg = NULL_RTX; in get_stored_val() 1921 read_reg = gen_int_mode (c, int_store_mode); in get_stored_val() 1922 read_reg = extract_low_bits (read_mode, int_store_mode, read_reg); in get_stored_val() [all …]
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| /netbsd-src/sys/dev/pci/ |
| H A D | igma.c | 302 reg = co->read_reg(cd, cd->vga_cntrl); in igma_adjust_chip() 520 reg = co->read_reg(cd, ii->ii_reg); in igma_i2cbb_set_bits() 541 reg = co->read_reg(cd, ii->ii_reg); in igma_i2cbb_set_bits() 565 reg = co->read_reg(cd, ii->ii_reg); in igma_i2cbb_read()
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| H A D | igmavar.h | 28 u_int32_t (*read_reg)(const struct igma_chip *, int); member
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| /netbsd-src/sys/dev/usb/ |
| H A D | uchcom.c | 459 read_reg(struct uchcom_softc *sc, in read_reg() function 503 return read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL); in get_status() 596 err = read_reg(sc, UCHCOM_REG_BREAK, &brk, UCHCOM_REG_LCR, &lcr); in set_break() 702 err = read_reg(sc, UCHCOM_REG_LCR, &lcr, UCHCOM_REG_LCR2, &lcr2); in set_line_control()
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| /netbsd-src/sys/dev/podulebus/ |
| H A D | esp_podule.c | 99 uint8_t (*read_reg)(struct ncr53c9x_softc *, int); member 140 esc->sc_esp_glue.gl_read_reg = devices[i].read_reg; in esp_podule_attach()
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| /netbsd-src/external/gpl3/gdb/dist/gdb/ |
| H A D | ChangeLog-2013 | 1671 <read_addr_from_reg>: Renames "read_reg". 1672 * dwarf2-frame.c (read_addr_from_reg): Renames "read_reg". 1675 Use read_addr_from_reg in place of read_reg. 1677 in place of read_reg. 1705 * dwarf2expr.h (struct dwarf_expr_context_funcs) <read_reg>:
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| H A D | ChangeLog-2003 | 10684 to read_reg and update its comment. Remove regnum member. 10686 Don't call read_reg when setting in_reg. Call read_reg to get 10689 to read_reg.
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| /netbsd-src/external/gpl3/gdb.old/dist/gdb/ |
| H A D | ChangeLog-2013 | 1671 <read_addr_from_reg>: Renames "read_reg". 1672 * dwarf2-frame.c (read_addr_from_reg): Renames "read_reg". 1675 Use read_addr_from_reg in place of read_reg. 1677 in place of read_reg. 1705 * dwarf2expr.h (struct dwarf_expr_context_funcs) <read_reg>:
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| H A D | ChangeLog-2003 | 10684 to read_reg and update its comment. Remove regnum member. 10686 Don't call read_reg when setting in_reg. Call read_reg to get 10689 to read_reg.
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