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Searched refs:num_display (Results 1 – 17 of 17) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/
H A Ddm_pp_interface.h81 uint32_t num_display; /* total number of display*/ member
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_vega12_hwmgr.c1484 if ((hwmgr->display_config->num_display > 1) && in vega12_notify_smc_display_config_after_ps_adjustment()
2184 disable_mclk_switching = ((1 < hwmgr->display_config->num_display) && in vega12_apply_clocks_adjust_rules()
2393 PPSMC_MSG_NumOfDisplays, hwmgr->display_config->num_display); in vega12_display_configuration_changed_task()
2443 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in vega12_check_smc_update_required_for_display_configuration()
H A Damdgpu_smu7_hwmgr.c2963 if (hwmgr->display_config->num_display == 0) in smu7_apply_state_adjust_rules()
2966 disable_mclk_switching = ((1 < hwmgr->display_config->num_display) && in smu7_apply_state_adjust_rules()
3647 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in smu7_find_dpm_states_clocks_in_dpm_table()
4062 if (hwmgr->display_config->num_display > 1 && in smu7_notify_smc_display_config_after_ps_adjustment()
4084 …LD(display_gap, CG_DISPLAY_GAP_CNTL, DISP_GAP, (hwmgr->display_config->num_display > 0) ? DISPLAY_… in smu7_program_display_gap()
4181 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in smu7_check_smc_update_required_for_display_configuration()
H A Damdgpu_vega10_hwmgr.c3259 if (hwmgr->display_config->num_display == 0) in vega10_apply_state_adjust_rules()
3262 disable_mclk_switching = ((1 < hwmgr->display_config->num_display) && in vega10_apply_state_adjust_rules()
3361 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in vega10_find_dpm_states_clocks_in_dpm_table()
3978 if ((hwmgr->display_config->num_display > 1) && in vega10_notify_smc_display_config_after_ps_adjustment()
4668 PPSMC_MSG_NumOfDisplays, hwmgr->display_config->num_display); in vega10_display_configuration_changed_task()
4755 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in vega10_check_smc_update_required_for_display_configuration()
H A Damdgpu_smu10_hwmgr.c671 hwmgr->display_config->num_display > 3 ? in smu10_dpm_force_dpm_level()
H A Damdgpu_vega20_hwmgr.c3574 hwmgr->display_config->num_display); in vega20_display_configuration_changed_task()
3648 disable_mclk_switching = ((1 < hwmgr->display_config->num_display) && in vega20_apply_clocks_adjust_rules()
3823 hwmgr->display_config->num_display) in vega20_check_smc_update_required_for_display_configuration()
H A Damdgpu_smu8_hwmgr.c1069 || (hwmgr->display_config->num_display >= 3); in smu8_apply_state_adjust_rules()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c68 adev->pm.pm_display_cfg.num_display = in dm_pp_apply_display_requirements()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/
H A Damdgpu_vega20_ppt.c2084 smu->display_config->num_display); in vega20_display_config_changed()
2099 disable_mclk_switching = ((1 < smu->display_config->num_display) && in vega20_apply_clocks_adjust_rules()
H A Damdgpu_navi10_ppt.c1087 smu->display_config->num_display); in navi10_display_config_changed()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_vegam_smumgr.c1015 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in vegam_populate_single_memory_level()
H A Damdgpu_fiji_smumgr.c1206 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in fiji_populate_single_memory_level()
H A Damdgpu_iceland_smumgr.c1287 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in iceland_populate_single_memory_level()
H A Damdgpu_polaris10_smumgr.c1111 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in polaris10_populate_single_memory_level()
H A Damdgpu_ci_smumgr.c1239 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in ci_populate_single_memory_level()
H A Damdgpu_tonga_smumgr.c1021 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in tonga_populate_single_memory_level()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_pm.c3514 adev->pm.pm_display_cfg.num_display = adev->pm.dpm.new_active_crtc_count; in amdgpu_pm_compute_clocks()