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Searched refs:isPPC64 (Results 1 – 25 of 34) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.cpp44 return STI.isPPC64() ? 16 : 8; in computeReturnSaveOffset()
46 return STI.isPPC64() ? 16 : 4; in computeReturnSaveOffset()
51 return STI.isPPC64() ? 40 : 20; in computeTOCSaveOffset()
57 return STI.isPPC64() ? -8U : -4U; in computeFramePointerSaveOffset()
61 if (STI.isAIXABI() || STI.isPPC64()) in computeLinkageSize()
62 return (STI.isELFv2ABI() ? 4 : 6) * (STI.isPPC64() ? 8 : 4); in computeLinkageSize()
74 return STI.isPPC64() ? -16U : -8U; in computeBasePointerSaveOffset()
78 return (STI.isAIXABI() && !STI.isPPC64()) ? 4 : 8; in computeCRSaveOffset()
242 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
445 Register R0 = Subtarget.isPPC64() ? PPC::X0 : PPC::R0; in findScratchRegister()
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H A DPPCInstr64Bit.td282 "ldat $rD, $rA, $FC", IIC_LdStLoad>, isPPC64,
292 "stdat $rS, $rA, $FC", IIC_LdStStore>, isPPC64,
560 "ldx $rD, $rA, $rB", IIC_LdStLD, []>, isPPC64;
581 "stdx $rS, $rA, $rB", IIC_LdStSTD, []>, isPPC64,
665 "ldx $rD, $rA, $rB", IIC_LdStLD, []>, isPPC64;
679 "stdx $rS, $rA, $rB", IIC_LdStSTD, []>, isPPC64,
697 "cmpd $crD, $rA, $rB", IIC_IntCompare>, isPPC64;
699 "cmpld $crD, $rA, $rB", IIC_IntCompare>, isPPC64;
701 "cmpdi $crD, $rA, $imm", IIC_IntCompare>, isPPC64;
704 IIC_IntCompare>, isPPC64;
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H A DPPCRegisterInfo.cpp96 : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR, in PPCRegisterInfo()
97 TM.isPPC64() ? 0 : 1, in PPCRegisterInfo()
98 TM.isPPC64() ? 0 : 1), in PPCRegisterInfo()
146 if (TM.isPPC64()) in getPointerRegClass()
151 if (TM.isPPC64()) in getPointerRegClass()
160 if (!TM.isPPC64() && Subtarget.isAIXABI()) in getCalleeSavedRegs()
189 if (TM.isPPC64()) { in getCalleeSavedRegs()
204 if (TM.isPPC64()) { in getCalleeSavedRegs()
245 return TM.isPPC64() in getCallPreservedMask()
255 return TM.isPPC64() ? (Subtarget.hasAltivec() ? CSR_SVR64_ColdCC_Altivec_RegMask in getCallPreservedMask()
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H A DPPCTOCRegDeps.cpp113 const bool isPPC64 = in processBlock() local
114 MBB.getParent()->getSubtarget<PPCSubtarget>().isPPC64(); in processBlock()
115 const unsigned TOCReg = isPPC64 ? PPC::X2 : PPC::R2; in processBlock()
H A DPPCSubtarget.cpp206 CriticalPathRCs.push_back(isPPC64() ? in getCriticalPathRCs()
241 bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); } in isPPC64() function in PPCSubtarget
244 return isPPC64() && hasPCRelativeMemops() && isELFv2ABI() && in isUsingPCRelativeCalls()
H A DPPCSubtarget.h227 bool isPPC64() const;
311 if (isPPC64()) in getRedZoneSize()
345 bool is64BitELFABI() const { return isSVR4ABI() && isPPC64(); } in is64BitELFABI()
346 bool is32BitELFABI() const { return isSVR4ABI() && !isPPC64(); } in is32BitELFABI()
H A DPPCAsmPrinter.cpp555 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || in EmitTlsCall()
556 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && in EmitTlsCall()
559 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || in EmitTlsCall()
560 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && in EmitTlsCall()
568 Register VarOffsetReg = Subtarget->isPPC64() ? PPC::X4 : PPC::R4; in EmitTlsCall()
598 MCInstBuilder(Subtarget->isPPC64() ? Opcode in EmitTlsCall()
627 const bool IsPPC64 = Subtarget->isPPC64(); in emitInstruction()
1362 if (!Subtarget->isPPC64()) in emitInstruction()
1507 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || in emitStartOfAsmFile()
1536 if (!Subtarget->isPPC64() && in emitFunctionEntryLabel()
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H A DPPCInstrInfo.cpp93 STI.isPPC64() ? PPC::BLR8 : PPC::BLR), in PPCInstrInfo()
631 if (!(Subtarget.isPPC64() && Subtarget.hasP9Vector() && in shouldReduceRegisterPressure()
691 assert((Subtarget.isPPC64() && Subtarget.hasP9Vector() && in generateLoadForNewConst()
1276 bool isPPC64 = Subtarget.isPPC64(); in analyzeBranch() local
1342 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1353 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1410 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1424 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1490 bool isPPC64 = Subtarget.isPPC64(); in insertBranch() local
1498 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : in insertBranch()
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H A DPPCISelLowering.cpp145 bool isPPC64 = Subtarget.isPPC64(); in PPCTargetLowering() local
146 setMinStackArgumentAlignment(isPPC64 ? Align(8) : Align(4)); in PPCTargetLowering()
228 if (isPPC64 || Subtarget.hasFPCVT()) { in PPCTargetLowering()
231 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
234 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
238 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
241 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
245 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
248 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
252 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
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H A DPPCTargetTransformInfo.cpp305 if (ST->isPPC64() && in getIntImmCostInst()
454 isLargeIntegerTy(!TM.isPPC64(), SrcType) || in mightUseCTR()
455 isLargeIntegerTy(!TM.isPPC64(), DstType)) in mightUseCTR()
656 isLargeIntegerTy(!TM.isPPC64(), CI->getSrcTy()->getScalarType()) || in mightUseCTR()
657 isLargeIntegerTy(!TM.isPPC64(), CI->getDestTy()->getScalarType())) in mightUseCTR()
659 } else if (isLargeIntegerTy(!TM.isPPC64(), in mightUseCTR()
666 } else if (!TM.isPPC64() && in mightUseCTR()
783 HWLoopInfo.CountType = TM.isPPC64() ? in isHardwareLoopProfitable()
879 return TypeSize::getFixed(ST->isPPC64() ? 64 : 32); in getRegisterBitWidth()
H A DPPCTargetMachine.h60 bool isPPC64() const { in isPPC64() function
H A DPPCCallingConv.td53 CCIfType<[i32, i1], CCIfSubtarget<"isPPC64()", CCPromoteToType<i64>>>,
54 CCIfType<[i1], CCIfNotSubtarget<"isPPC64()", CCPromoteToType<i32>>>,
75 CCIfType<[i32, i1], CCIfSubtarget<"isPPC64()", CCPromoteToType<i64>>>,
76 CCIfType<[i1], CCIfNotSubtarget<"isPPC64()", CCPromoteToType<i32>>>,
H A DPPCISelDAGToDAG.cpp3886 if (TM.getOptLevel() == CodeGenOpt::None || !TM.isPPC64()) in tryIntCompareInGPR()
4299 bool isPPC64 = (PtrVT == MVT::i64); in trySETCC() local
4321 if (isPPC64) break; in trySETCC()
4349 if (isPPC64) break; in trySETCC()
4359 if (isPPC64) break; in trySETCC()
5249 bool IsPPC64 = Subtarget->isPPC64(); in Select()
5272 bool IsPPC64 = Subtarget->isPPC64(); in Select()
5382 bool isPPC64 = (PtrVT == MVT::i64); in Select() local
5388 if (Subtarget->isISA3_0() && Subtarget->isPPC64()) { in Select()
5414 if (!isPPC64) in Select()
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H A DPPCTLSDynamicCall.cpp52 bool Is64Bit = MBB.getParent()->getSubtarget<PPCSubtarget>().isPPC64(); in processBlock()
H A DPPCBoolRetToInt.cpp95 Type *IntTy = ST->isPPC64() ? Type::getInt64Ty(V->getContext()) in translate()
H A DPPCInstrFormats.td19 bit PPC64 = 0; // Default value, override with isPPC64
84 bit PPC64 = 0; // Default value, override with isPPC64
H A DPPCInstrInfo.td601 class isPPC64 { bit PPC64 = 1; }
1155 def In32BitMode : Predicate<"!Subtarget->isPPC64()">;
1156 def In64BitMode : Predicate<"Subtarget->isPPC64()">;
4652 bit PPC64 = 0; // Default value, override with isPPC64
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCTargetDesc.cpp70 bool isPPC64 = in createPPCMCRegisterInfo() local
72 unsigned Flavour = isPPC64 ? 0 : 1; in createPPCMCRegisterInfo()
73 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR; in createPPCMCRegisterInfo()
98 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 || in createPPCMCAsmInfo() local
103 MAI = new PPCXCOFFMCAsmInfo(isPPC64, TheTriple); in createPPCMCAsmInfo()
105 MAI = new PPCELFMCAsmInfo(isPPC64, TheTriple); in createPPCMCAsmInfo()
108 unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1; in createPPCMCAsmInfo()
H A DPPCAsmBackend.cpp222 bool Is64 = TT.isPPC64(); in createObjectTargetWriter()
245 if (TT.isPPC64()) { in getFixupKind()
H A DPPCMCCodeEmitter.cpp388 bool isPPC64 = TT.isPPC64(); in getTLSRegEncoding() local
389 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getTLSRegEncoding()
H A DPPCInstPrinter.cpp460 if (!TT.isPPC64()) in printBranchOperand()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp104 bool isPPC64() const { return IsPPC64; } in isPPC64() function in __anoncdd30e2e0111::PPCAsmParser
147 IsPPC64 = TheTriple.isPPC64(); in PPCAsmParser()
243 bool isPPC64() const { return IsPPC64; } in isPPC64() function
466 if (isPPC64()) in addRegGxRCOperands()
473 if (isPPC64()) in addRegGxRCNoR0Operands()
1198 RegNo = isPPC64() ? PPC::LR8 : PPC::LR; in MatchRegisterName()
1201 RegNo = isPPC64() ? PPC::CTR8 : PPC::CTR; in MatchRegisterName()
1208 RegNo = isPPC64() ? XRegs[IntVal] : RRegs[IntVal]; in MatchRegisterName()
1427 Operands.push_back(PPCOperand::CreateImm(IntVal, S, E, isPPC64())); in ParseOperand()
1448 Operands.push_back(PPCOperand::CreateFromMCExpr(EVal, S, E, isPPC64())); in ParseOperand()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/ADT/
H A DTriple.h768 bool isPPC64() const { in isPPC64() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/
H A DTargetLibraryInfo.cpp140 if (T.isPPC64() || T.getArch() == Triple::sparcv9 || in initialize()
/netbsd-src/external/apache2/llvm/dist/clang/lib/Sema/
H A DSema.cpp382 if (Context.getTargetInfo().getTriple().isPPC64() && in Initialize()

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