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Searched refs:getSchedClass (Results 1 – 25 of 34) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetSchedule.cpp110 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass()); in getNumMicroOps()
135 unsigned SchedClass = MI->getDesc().getSchedClass(); in resolveSchedClass()
198 unsigned DefClass = DefMI->getDesc().getSchedClass(); in computeOperandLatency()
262 unsigned SCIdx = TII->get(Opcode).getSchedClass(); in computeInstrLatency()
327 unsigned SchedClass = MI->getDesc().getSchedClass(); in computeReciprocalThroughput()
340 unsigned SchedClass = TII->get(Opcode).getSchedClass(); in computeReciprocalThroughput()
H A DDFAPacketizer.cpp58 unsigned Action = ItinActions[MID->getSchedClass()]; in canReserveResources()
59 if (MID->getSchedClass() == 0 || Action == 0) in canReserveResources()
67 unsigned Action = ItinActions[MID->getSchedClass()]; in reserveResources()
68 if (MID->getSchedClass() == 0 || Action == 0) in reserveResources()
H A DScoreboardHazardRecognizer.cpp128 unsigned idx = MCID->getSchedClass(); in getHazardType()
187 unsigned idx = MCID->getSchedClass(); in EmitInstruction()
H A DTargetInstrInfo.cpp1098 unsigned DefClass = get(DefNode->getMachineOpcode()).getSchedClass(); in getOperandLatency()
1101 unsigned UseClass = get(UseNode->getMachineOpcode()).getSchedClass(); in getOperandLatency()
1113 return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass()); in getInstrLatency()
1125 unsigned Class = MI.getDesc().getSchedClass(); in getNumMicroOps()
1159 return ItinData->getStageLatency(MI.getDesc().getSchedClass()); in getInstrLatency()
1169 unsigned DefClass = DefMI.getDesc().getSchedClass(); in hasLowDefLatency()
1262 unsigned DefClass = DefMI.getDesc().getSchedClass(); in getOperandLatency()
1263 unsigned UseClass = UseMI.getDesc().getSchedClass(); in getOperandLatency()
H A DMachineCombiner.cpp394 unsigned Idx = TII->get(Opc).getSchedClass(); in instr2instrSC()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZHazardRecognizer.cpp47 const MCSchedClassDesc *SC = getSchedClass(SU); in getNumDecoderSlots()
93 const MCSchedClassDesc *SC = getSchedClass(SU); in fitsIntoCurrentGroup()
171 const MCSchedClassDesc *SC = getSchedClass(SU); in dumpSU()
272 const MCSchedClassDesc *SC = getSchedClass(SU); in EmitInstruction()
341 const MCSchedClassDesc *SC = getSchedClass(SU); in groupingCost()
390 const MCSchedClassDesc *SC = getSchedClass(SU); in resourcesCost()
H A DSystemZHazardRecognizer.h121 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass() function
H A DSystemZMachineScheduler.cpp255 const MCSchedClassDesc *SC = HazardRec->getSchedClass(SU); in releaseTopNode()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/MC/
H A DMCSchedule.cpp70 unsigned SchedClass = MCII.get(Inst.getOpcode()).getSchedClass(); in computeInstrLatency()
113 unsigned SchedClass = MCII.get(Inst.getOpcode()).getSchedClass(); in getReciprocalThroughput()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/MC/MCDisassembler/
H A DDisassembler.cpp182 unsigned SCClass = Desc.getSchedClass(); in getItineraryLatency()
209 unsigned SCClass = Desc.getSchedClass(); in getLatency()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCHazardRecognizers.cpp66 if (!PredMCID || PredMCID->getSchedClass() != PPC::Sched::IIC_SprMTSPR) in isBCTRAfterSet()
90 unsigned IIC = MCID->getSchedClass(); in mustComeFirst()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64StorePairSuppress.cpp85 unsigned SCIdx = TII->get(AArch64::STPDi).getSchedClass(); in shouldAddSTPToBlock()
H A DAArch64SIMDInstrOpt.cpp228 unsigned SCIdx = InstDesc->getSchedClass(); in shouldReplaceInst()
243 IDesc->getSchedClass()); in shouldReplaceInst()
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp597 ", // " << j << " " << SchedModels.getSchedClass(j).Name << "\n"; in EmitItineraries()
1305 assert(SchedModels.getSchedClass(0).Name == "NoInstrModel" in EmitSchedClassTables()
1313 const CodeGenSchedClass &SchedClass = SchedModels.getSchedClass(SCIdx); in EmitSchedClassTables()
1578 const CodeGenSchedClass &SC = SchedModels.getSchedClass(VC); in emitSchedModelHelpersImpl()
1620 emitPredicates(T, SchedModels.getSchedClass(T.ToClassIdx), PE, OS); in emitSchedModelHelpersImpl()
1623 emitPredicates(*FinalT, SchedModels.getSchedClass(FinalT->ToClassIdx), in emitSchedModelHelpersImpl()
H A DCodeGenSchedule.h541 CodeGenSchedClass &getSchedClass(unsigned Idx) { in getSchedClass() function
545 const CodeGenSchedClass &getSchedClass(unsigned Idx) const { in getSchedClass() function
H A DCodeGenSchedule.cpp909 CodeGenSchedClass &SC = getSchedClass(SCIdx); in collectSchedClasses()
1662 << SchedModels.getSchedClass(SCTrans.ToClassIdx).Name << "(" in dumpTransition()
1687 const CodeGenSchedClass &FromSC = SchedModels.getSchedClass(FromClassIdx); in inferFromTransitions()
1702 SchedModels.getSchedClass(FromClassIdx) in inferFromTransitions()
1998 const CodeGenSchedClass &SC = getSchedClass(SCIdx); in checkCompleteness()
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-mca/Views/
H A DInstructionInfoView.cpp102 unsigned SchedClassID = MCDesc.getSchedClass(); in collectData()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/
H A DMCInstrDesc.h612 unsigned getSchedClass() const { return SchedClass; } in getSchedClass() function
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DScheduleDAGInstrs.h265 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass() function
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/
H A DSchedClassResolution.cpp235 unsigned SchedClassId = InstrInfo.get(MCI.getOpcode()).getSchedClass(); in resolveSchedClassId()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInstrInfo.cpp428 int SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass(); in getCVIResources()
447 int SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass(); in getUnits()
458 int SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass(); in getOtherReservedSlots()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp2182 unsigned SchedClass = MI.getDesc().getSchedClass(); in isEarlySourceInstr()
2374 unsigned SchedClass = MI.getDesc().getSchedClass(); in isLateResultInstr()
2623 unsigned SchedClass = MI.getDesc().getSchedClass(); in isTC1()
2628 unsigned SchedClass = MI.getDesc().getSchedClass(); in isTC2()
2633 unsigned SchedClass = MI.getDesc().getSchedClass(); in isTC2Early()
2638 unsigned SchedClass = MI.getDesc().getSchedClass(); in isTC4x()
4209 return ItinData->getStageLatency(MI.getDesc().getSchedClass()); in getInstrTimingClassLatency()
4514 const InstrStage &IS = *II.beginStage(MI.getDesc().getSchedClass()); in getUnits()
4581 << " Class: " << NewMI->getDesc().getSchedClass()); in genAllInsnTimingClasses()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MCA/
H A DInstruction.h263 unsigned getSchedClass() const { return RD->SchedClassID; } in getSchedClass() function
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/
H A Dllvm-exegesis.cpp337 State.getInstrInfo().get(Opcode).getSchedClass() == 0) { in benchmarkMain()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/
H A DInstrBuilder.cpp521 unsigned SchedClassID = MCDesc.getSchedClass(); in createInstrDescImpl()

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