| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 557 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
597 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues()
932 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
933 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue()
991 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeImm12OpValue()
997 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrModeImm12OpValue()
1068 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeRQOpValue()
1069 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M1.getReg()); in getMveAddrModeRQOpValue()
1088 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeQOpValue()
1122 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getT2AddrModeImm8s4OpValue()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetFrameLoweringImpl.cpp | 48 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getFrameIndexReference()
67 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in getCalleeSaves()
81 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in determineCalleeSaves()
162 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getDwarfFrameBase()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreMachineFunctionInfo.cpp | 39 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot()
57 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot()
70 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot()
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| H A D | XCoreSubtarget.h | 59 const TargetRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
60 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsFrameLowering.cpp | 95 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP()
104 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP()
116 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize()
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| H A D | MipsSEFrameLowering.cpp | 102 RegInfo(*Subtarget.getRegisterInfo()) {} in ExpandPseudo()
409 *static_cast<const MipsRegisterInfo *>(STI.getRegisterInfo()); in emitPrologue()
431 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); in emitPrologue()
619 STI.getRegisterInfo(), 0); in emitInterruptPrologueStub()
630 STI.getRegisterInfo(), 0); in emitInterruptPrologueStub()
697 *static_cast<const MipsRegisterInfo *>(STI.getRegisterInfo()); in emitEpilogue()
763 STI.getRegisterInfo()); in emitInterruptEpilogueStub()
771 STI.getRegisterInfo()); in emitInterruptEpilogueStub()
855 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in setAliasRegs()
864 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in determineCalleeSaves()
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| H A D | MipsMachineFunction.cpp | 150 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEhDataRegsFI()
168 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createISRRegFI()
195 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in getMoveF64ViaSpillFI()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCSubtarget.h | 55 const ARCRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
56 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiSubtarget.h | 54 const LanaiRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
55 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VESubtarget.h | 55 const VERegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
56 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| H A D | LVLGen.cpp | 62 (MBB.getParent()->getSubtarget<VESubtarget>().getRegisterInfo()->getName(no)) in runOnMachineBasicBlock()
126 TRI = Subtarget.getRegisterInfo(); in runOnMachineFunction()
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| H A D | VEFrameLowering.cpp | 314 const VERegisterInfo &RegInfo = *STI.getRegisterInfo(); in emitPrologue()
422 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); in hasFP()
432 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP()
448 const VERegisterInfo *RegInfo = STI.getRegisterInfo(); in getFrameIndexReference()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430Subtarget.h | 67 const TargetRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
68 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFSubtarget.h | 86 const TargetRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
87 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXSubtarget.h | 61 const NVPTXRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
62 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 62 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in getVGPRSpillLaneOrTempRegister()
164 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in buildGitPtr()
190 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionFlatScratchInit()
338 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in getEntryFunctionReservedScratchRsrcReg()
407 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionPrologue()
521 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionScratchRsrcRegSetup()
695 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in buildScratchExecCopy()
734 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in emitPrologue()
971 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in emitEpilogue()
1117 const SIRegisterInfo *RI = MF.getSubtarget<GCNSubtarget>().getRegisterInfo(); in getFrameIndexReference()
[all …]
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| H A D | R600Subtarget.h | 67 const R600RegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
68 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| H A D | SILowerSGPRSpills.cpp | 87 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in insertCSRSaves()
127 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in insertCSRRestores()
259 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in lowerShiftReservedVGPR()
295 TRI = &TII->getRegisterInfo(); in runOnMachineFunction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblySubtarget.h | 80 const WebAssemblyRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
81 return &getInstrInfo()->getRegisterInfo(); in getRegisterInfo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRSubtarget.h | 45 const AVRRegisterInfo *getRegisterInfo() const override { return &InstrInfo.getRegisterInfo(); } in getRegisterInfo() function
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcSubtarget.h | 68 const SparcRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
69 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kSubtarget.h | 151 const M68kRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
152 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVFrameLowering.cpp | 35 Register RAReg = STI.getRegisterInfo()->getRARegister(); in emitSCSPrologue()
84 Register RAReg = STI.getRegisterInfo()->getRARegister(); in emitSCSEpilogue()
220 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); in hasFP()
230 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP()
334 const RISCVRegisterInfo *RI = STI.getRegisterInfo(); in emitPrologue()
489 const RISCVRegisterInfo *RI = STI.getRegisterInfo(); in emitPrologue()
522 const RISCVRegisterInfo *RI = STI.getRegisterInfo(); in emitEpilogue()
605 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getFrameIndexReference()
848 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); in processFunctionBeforeFrameFinalized()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSubtarget.h | 100 const SystemZRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
101 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostSelectOptimize.cpp | 100 auto TRI = Subtarget.getRegisterInfo(); in optimizeNZCVDefs()
124 LiveRegUnits LRU(*MBB.getParent()->getSubtarget().getRegisterInfo()); in optimizeNZCVDefs()
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