| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 106 if (getMemOperandWithOffsetWidth(MIa, BaseOpA, OffsetA, WidthA, TRI) && in areMemAccessesTriviallyDisjoint()
107 getMemOperandWithOffsetWidth(MIb, BaseOpB, OffsetB, WidthB, TRI)) { in areMemAccessesTriviallyDisjoint()
757 bool LanaiInstrInfo::getMemOperandWithOffsetWidth( in getMemOperandWithOffsetWidth() function in LanaiInstrInfo
816 if (!getMemOperandWithOffsetWidth(LdSt, BaseOp, Offset, Width, TRI)) in getMemOperandsWithOffsetWidth()
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| H A D | LanaiInstrInfo.h | 76 bool getMemOperandWithOffsetWidth(const MachineInstr &LdSt,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 95 bool getMemOperandWithOffsetWidth(const MachineInstr &LdSt,
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| H A D | RISCVInstrInfo.cpp | 898 bool RISCVInstrInfo::getMemOperandWithOffsetWidth( in getMemOperandWithOffsetWidth() function in RISCVInstrInfo
939 if (getMemOperandWithOffsetWidth(MIa, BaseOpA, OffsetA, WidthA, TRI) && in areMemAccessesTriviallyDisjoint()
940 getMemOperandWithOffsetWidth(MIb, BaseOpB, OffsetB, WidthB, TRI)) { in areMemAccessesTriviallyDisjoint()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 136 bool getMemOperandWithOffsetWidth(const MachineInstr &MI,
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| H A D | AArch64InstrInfo.cpp | 1075 if (getMemOperandWithOffsetWidth(MIa, BaseOpA, OffsetA, OffsetAIsScalable, in areMemAccessesTriviallyDisjoint()
1077 getMemOperandWithOffsetWidth(MIb, BaseOpB, OffsetB, OffsetBIsScalable, in areMemAccessesTriviallyDisjoint()
2521 if (!getMemOperandWithOffsetWidth(LdSt, BaseOp, Offset, OffsetIsScalable, in getMemOperandsWithOffsetWidth()
2546 bool AArch64InstrInfo::getMemOperandWithOffsetWidth( in getMemOperandWithOffsetWidth() function in AArch64InstrInfo
7092 !getMemOperandWithOffsetWidth(MI, Base, Offset, OffsetIsScalable, Width, in fixupPostOutline()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 532 bool getMemOperandWithOffsetWidth(const MachineInstr &LdSt,
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| H A D | PPCInstrInfo.cpp | 2742 if (!getMemOperandWithOffsetWidth(LdSt, BaseOp, Offset, Width, TRI)) in getMemOperandsWithOffsetWidth()
2830 if (!getMemOperandWithOffsetWidth(FirstLdSt, Base1, Offset1, Width1, TRI) || in shouldClusterMemOps()
2831 !getMemOperandWithOffsetWidth(SecondLdSt, Base2, Offset2, Width2, TRI) || in shouldClusterMemOps()
5447 bool PPCInstrInfo::getMemOperandWithOffsetWidth( in getMemOperandWithOffsetWidth() function in PPCInstrInfo
5488 if (getMemOperandWithOffsetWidth(MIa, BaseOpA, OffsetA, WidthA, TRI) && in areMemAccessesTriviallyDisjoint()
5489 getMemOperandWithOffsetWidth(MIb, BaseOpB, OffsetB, WidthB, TRI)) { in areMemAccessesTriviallyDisjoint()
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