| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 622 MI.addOperand(MCOperand::createImm(tmp)); in DecodeINSVE_DF() 628 MI.addOperand(MCOperand::createImm(0)); in DecodeINSVE_DF() 642 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATIMMR6() 656 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATI() 695 MI.addOperand(MCOperand::createImm(Imm)); in DecodeAddiGroupBranch() 729 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP35GroupBranchMMR6() 768 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDaddiGroupBranch() 802 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP37GroupBranchMMR6() 841 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP65GroupBranchMMR6() 880 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP75GroupBranchMMR6() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 557 Inst.addOperand(MCOperand::createImm(getImm())); in addImmOperands() 566 Inst.addOperand(MCOperand::createImm(getImm())); in addS16ImmOperands() 569 Inst.addOperand(MCOperand::createImm(getImmS16Context())); in addS16ImmOperands() 581 Inst.addOperand(MCOperand::createImm(getImm())); in addU16ImmOperands() 584 Inst.addOperand(MCOperand::createImm(getImmU16Context())); in addU16ImmOperands() 595 Inst.addOperand(MCOperand::createImm(getImm() / 4)); in addBranchTargetOperands() 725 Inst.addOperand(MCOperand::createImm(-Op.getImm())); in addNegOperand() 756 TmpInst.addOperand(MCOperand::createImm( in ProcessInstruction() 800 TmpInst.addOperand(MCOperand::createImm(L)); in ProcessInstruction() 859 TmpInst.addOperand(MCOperand::createImm(B)); in ProcessInstruction() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 68 Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm))); in decodeCondBrTarget() 76 Inst.addOperand(MCOperand::createImm(Offset)); in decodeDirectBrTarget() 197 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand() 205 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 213 Inst.addOperand(MCOperand::createImm(Imm)); in decodeImmZeroOperand() 256 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp))); in decodeMemRIOperands() 277 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 2))); in decodeMemRIXOperands() 294 Inst.addOperand(MCOperand::createImm(Disp)); in decodeMemRIHashOperands() 309 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 4))); in decodeMemRIX16Operands() 324 Inst.addOperand(MCOperand::createImm(SignExtend64<34>(Disp))); in decodeMemRI34PCRelOperands() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEAsmPrinter.cpp | 97 MCOperand czero = MCOperand::createImm(0); in emitBSIC() 108 MCOperand CZero = MCOperand::createImm(0); in emitLEAzzi() 120 MCOperand CZero = MCOperand::createImm(0); in emitLEASLzzi() 132 MCOperand CZero = MCOperand::createImm(0); in emitLEAzii() 175 MCOperand M032 = MCOperand::createImm(M0(32)); in emitHiLo() 210 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETGOTAndEmitMCInsts() 214 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETGOTAndEmitMCInsts() 258 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETFunPLTAndEmitMCInsts() 262 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETFunPLTAndEmitMCInsts() 306 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETTLSAddrAndEmitMCInsts() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 835 CCI = MI.insert(CCI, MCOperand::createImm(CC)); in AddThumbPredicate() 852 VCCI = MI.insert(VCCI, MCOperand::createImm(VCC)); in AddThumbPredicate() 1453 Inst.addOperand(MCOperand::createImm(Val)); in DecodePredicateOperand() 1502 Inst.addOperand(MCOperand::createImm(Op)); in DecodeSORegImmOperand() 1537 Inst.addOperand(MCOperand::createImm(Shift)); in DecodeSORegRegOperand() 1661 Inst.addOperand(MCOperand::createImm(~(msb_mask ^ lsb_mask))); in DecodeBitfieldMaskOperand() 1750 Inst.addOperand(MCOperand::createImm(coproc)); in DecodeCopMemInstruction() 1751 Inst.addOperand(MCOperand::createImm(CRd)); in DecodeCopMemInstruction() 1789 Inst.addOperand(MCOperand::createImm(imm)); in DecodeCopMemInstruction() 1812 Inst.addOperand(MCOperand::createImm(imm)); in DecodeCopMemInstruction() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 164 Inst.addOperand(MCOperand::createImm(SignExtend32<9>(S9))); in DecodeMEMrs9() 183 Inst.addOperand(MCOperand::createImm(Offset)); in DecodeSymbolicOperandOff() 201 Inst.addOperand(MCOperand::createImm( in DecodeSignedOperand() 214 MCOperand::createImm(InsnS < max ? static_cast<int>(InsnS) : -1)); in DecodeFromCyclicRange() 230 Inst.addOperand(MCOperand::createImm(LImm)); in DecodeStLImmInstruction() 231 Inst.addOperand(MCOperand::createImm(0)); in DecodeStLImmInstruction() 248 Inst.addOperand(MCOperand::createImm(LImm)); in DecodeLdLImmInstruction() 249 Inst.addOperand(MCOperand::createImm(0)); in DecodeLdLImmInstruction() 266 Inst.addOperand(MCOperand::createImm((uint32_t)(Insn >> 32))); in DecodeLdRLImmInstruction() 283 Inst.addOperand(MCOperand::createImm(Value)); in DecodeMoveHRegInstruction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/Disassembler/ |
| H A D | SystemZDisassembler.cpp | 174 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand() 182 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 256 Inst.addOperand(MCOperand::createImm(Value)); in decodePCDBLOperand() 297 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDAddr12Operand() 307 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand() 318 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDXAddr12Operand() 330 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand() 342 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len4Operand() 343 Inst.addOperand(MCOperand::createImm(Length + 1)); in decodeBDLAddr12Len4Operand() 354 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len8Operand() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 127 Instr.addOperand(MCOperand::createImm(AluOp)); in PostOperandDecodeAdjust() 181 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeRiMemoryValue() 205 Inst.addOperand(MCOperand::createImm(SignExtend32<10>(Offset))); in decodeSplsValue() 223 MI.addOperand(MCOperand::createImm(Insn)); in decodeBranch() 230 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeShiftImm() 240 Inst.addOperand(MCOperand::createImm(Val)); in decodePredicateOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 832 Inst.addOperand(MCOperand::createImm(64 - Imm)); in DecodeFixedPointScaleImm32() 839 Inst.addOperand(MCOperand::createImm(64 - Imm)); in DecodeFixedPointScaleImm64() 855 Inst.addOperand(MCOperand::createImm(ImmVal)); in DecodePCRelLabel19() 861 Inst.addOperand(MCOperand::createImm((Imm >> 1) & 1)); in DecodeMemExtend() 862 Inst.addOperand(MCOperand::createImm(Imm & 1)); in DecodeMemExtend() 869 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeMRSSystemRegister() 879 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeMSRSystemRegister() 902 Inst.addOperand(MCOperand::createImm(1)); in DecodeFMOVLaneInstruction() 909 Inst.addOperand(MCOperand::createImm(Add - Imm)); in DecodeVecShiftRImm() 915 Inst.addOperand(MCOperand::createImm((Imm + Add) & (Add - 1))); in DecodeVecShiftLImm() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 394 Inst.addOperand(MCOperand::createImm(0)); in addExpr() 397 MCOperand::createImm(static_cast<int32_t>(ConstExpr->getValue()))); in addExpr() 438 Inst.addOperand(MCOperand::createImm(getMemOp())); in addMemRegImmOperands() 446 Inst.addOperand(MCOperand::createImm(getMemOp())); in addMemRegRegOperands() 470 MCOperand::createImm(static_cast<int32_t>(ConstExpr->getValue()))); in addLoImm16Operands() 493 Inst.addOperand(MCOperand::createImm(ConstExpr->getValue() & 0xffff)); in addLoImm16AndOperands() 501 Inst.addOperand(MCOperand::createImm(ConstExpr->getValue() >> 16)); in addHiImm16Operands() 524 Inst.addOperand(MCOperand::createImm(ConstExpr->getValue() >> 16)); in addHiImm16AndOperands() 532 Inst.addOperand(MCOperand::createImm(ConstExpr->getValue() & 0x1fffff)); in addLoImm21Operands() 603 static std::unique_ptr<LanaiOperand> createImm(const MCExpr *Value, in createImm() function [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/Disassembler/ |
| H A D | WebAssemblyDisassembler.cpp | 104 MI.addOperand(MCOperand::createImm(Val)); in parseLEBImmediate() 119 MI.addOperand(MCOperand::createImm(static_cast<int64_t>(Val))); in parseImmediate() 229 MCOperand::createImm(int64_t(WebAssembly::BlockType::Invalid))); in getInstruction() 231 MI.addOperand(MCOperand::createImm(Val & 0x7f)); in getInstruction() 259 MI.addOperand(MCOperand::createImm(Val & 0x7f)); in getInstruction() 262 MCOperand::createImm(int64_t(WebAssembly::HeapType::Invalid))); in getInstruction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 136 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOARr() 150 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIORdA() 158 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOBIT() 159 Inst.addOperand(MCOperand::createImm(b)); in decodeFIOBIT() 167 Inst.addOperand(MCOperand::createImm(Field << 1)); in decodeCallTarget() 219 Inst.addOperand(MCOperand::createImm(k)); in decodeFWRdK()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 322 MI.addOperand(MCOperand::createImm(0)); in DecodeASX() 331 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeASX() 335 MI.addOperand(MCOperand::createImm(simm32)); in DecodeASX() 353 MI.addOperand(MCOperand::createImm(0)); in DecodeAS() 357 MI.addOperand(MCOperand::createImm(simm32)); in DecodeAS() 477 MI.addOperand(MCOperand::createImm(sy)); in DecodeCAS() 479 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeCAS() 522 MI.addOperand(MCOperand::createImm(tgt)); in DecodeSIMM7() 529 MI.addOperand(MCOperand::createImm(tgt)); in DecodeSIMM32() 572 MI.addOperand(MCOperand::createImm(VEValToCondCode(cf, isIntegerBCKind(MI)))); in DecodeCCOperand() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 304 ITInst.addOperand(MCOperand::createImm(ITState.Cond)); in flushPendingInstructions() 305 ITInst.addOperand(MCOperand::createImm(ITState.Mask)); in flushPendingInstructions() 2456 Inst.addOperand(MCOperand::createImm(0)); in addExpr() 2458 Inst.addOperand(MCOperand::createImm(CE->getValue())); in addExpr() 2475 Inst.addOperand(MCOperand::createImm(unsigned(getCondCode()))); in addCondCodeOperands() 2482 Inst.addOperand(MCOperand::createImm(unsigned(getVPTPred()))); in addVPTPredNOperands() 2506 Inst.addOperand(MCOperand::createImm(getCoproc())); in addCoprocNumOperands() 2511 Inst.addOperand(MCOperand::createImm(getCoproc())); in addCoprocRegOperands() 2516 Inst.addOperand(MCOperand::createImm(CoprocOption.Val)); in addCoprocOptionOperands() 2521 Inst.addOperand(MCOperand::createImm(ITMask.Mask)); in addITMaskOperands() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.cpp | 39 NopInst.addOperand(MCOperand::createImm(0)); in getNop() 40 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNop() 46 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNop()
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| H A D | ARMAsmPrinter.cpp | 1467 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL)); in emitInstruction() 1499 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL)); in emitInstruction() 1808 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL)); in emitInstruction() 1822 TmpInst.addOperand(MCOperand::createImm(MI->getOperand(2).getImm())); in emitInstruction() 1824 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL)); in emitInstruction() 1836 TmpInst.addOperand(MCOperand::createImm(MI->getOperand(2).getImm())); in emitInstruction() 1838 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL)); in emitInstruction() 2187 TmpInstDSB.addOperand(MCOperand::createImm(0xf)); in emitInstruction() 2191 TmpInstISB.addOperand(MCOperand::createImm(0xf)); in emitInstruction() 2199 TmpInstDSB.addOperand(MCOperand::createImm(0xf)); in emitInstruction() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 399 MI.addOperand(MCOperand::createImm(simm13)); in DecodeMem() 407 MI.addOperand(MCOperand::createImm(asi)); in DecodeMem() 516 MI.addOperand(MCOperand::createImm(tgt)); in DecodeCall() 523 MI.addOperand(MCOperand::createImm(tgt)); in DecodeSIMM13() 552 MI.addOperand(MCOperand::createImm(simm13)); in DecodeJMPL() 580 MI.addOperand(MCOperand::createImm(simm13)); in DecodeReturn() 616 MI.addOperand(MCOperand::createImm(simm13)); in DecodeSWAP() 624 MI.addOperand(MCOperand::createImm(asi)); in DecodeSWAP() 649 MI.addOperand(MCOperand::createImm(imm7)); in DecodeTRAP() 657 MI.addOperand(MCOperand::createImm(cc)); in DecodeTRAP()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVMCInstLower.cpp | 106 MCOp = MCOperand::createImm(MO.getImm()); in LowerRISCVMachineOperandToMCOperand() 193 MCOp = MCOperand::createImm(MO.getImm()); in lowerRISCVVMachineInstrToMCInst() 236 OutMI.addOperand(MCOperand::createImm( in lowerRISCVMachineInstrToMCInst() 243 MCOperand::createImm(RISCVSysReg::lookupSysRegByName("VL")->Encoding)); in lowerRISCVMachineInstrToMCInst()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 82 return addOperand(Inst, MCOperand::createImm(Imm)); in decodeSoppBrTarget() 94 return addOperand(Inst, MCOperand::createImm(Offset)); in decodeSMEMOffset() 542 insertNamedMCOperand(MI, MCOperand::createImm(0), in getInstruction() 555 insertNamedMCOperand(MI, MCOperand::createImm(CPol), in getInstruction() 572 MI.insert(TFEIter, MCOperand::createImm(0)); in getInstruction() 583 MI.insert(SWZIter, MCOperand::createImm(0)); in getInstruction() 641 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::clamp); in convertSDWAInst() 650 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::omod); in convertSDWAInst() 665 insertNamedMCOperand(MI, MCOperand::createImm(0), in convertDPP8Inst() 670 insertNamedMCOperand(MI, MCOperand::createImm(0), in convertDPP8Inst() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/Disassembler/ |
| H A D | MSP430Disassembler.cpp | 124 MI.addOperand(MCOperand::createImm(Imm)); in DecodeCGImm() 138 MI.addOperand(MCOperand::createImm((int16_t)Imm)); in DecodeMemOperand() 347 MI.addOperand(MCOperand::createImm(SignExtend32(Offset, 10))); in getInstructionCJ() 353 MI.addOperand(MCOperand::createImm(getCondCode(Cond))); in getInstructionCJ()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 274 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand() 293 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 314 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm << 1))); in decodeSImmOperandAndLsl1() 325 Inst.addOperand(MCOperand::createImm(Imm)); in decodeCLUIImmOperand() 336 Inst.addOperand(MCOperand::createImm(Imm)); in decodeFRMArg()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1476 Inst.addOperand(MCOperand::createImm(0)); in addExpr() 1478 Inst.addOperand(MCOperand::createImm(CE->getValue())); in addExpr() 1577 Inst.addOperand(MCOperand::createImm(getVectorIndex())); in addVectorIndexOperands() 1584 Inst.addOperand(MCOperand::createImm(bool(isExactFPImm<ImmIs1>()))); in addExactFPImmOperands() 1599 Inst.addOperand(MCOperand::createImm(ShiftedVal->first)); in addImmWithOptionalShiftOperands() 1600 Inst.addOperand(MCOperand::createImm(ShiftedVal->second)); in addImmWithOptionalShiftOperands() 1603 Inst.addOperand(MCOperand::createImm(getShiftedImmShift())); in addImmWithOptionalShiftOperands() 1606 Inst.addOperand(MCOperand::createImm(0)); in addImmWithOptionalShiftOperands() 1614 Inst.addOperand(MCOperand::createImm(-ShiftedVal->first)); in addImmNegWithOptionalShiftOperands() 1615 Inst.addOperand(MCOperand::createImm(ShiftedVal->second)); in addImmNegWithOptionalShiftOperands() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 242 static std::unique_ptr<CSKYOperand> createImm(const MCExpr *Val, SMLoc S, in createImm() function 254 Inst.addOperand(MCOperand::createImm(CE->getValue())); in addExpr() 502 Operands.push_back(CSKYOperand::createImm(IdVal, S, E)); in parseImmediate() 566 Operands.push_back(CSKYOperand::createImm(Res, S, E)); in parseCSKYSymbol() 595 Operands.push_back(CSKYOperand::createImm(Res, S, E)); in parseConstpoolSymbol()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 229 Inst.addOperand(MCOperand::createImm(Values[Val])); in DecodeBitpOperand() 235 Inst.addOperand(MCOperand::createImm(-(int64_t)Val)); in DecodeNegImmOperand() 364 Inst.addOperand(MCOperand::createImm(Op1)); in Decode2RImmInstruction() 405 Inst.addOperand(MCOperand::createImm(Op2)); in DecodeRUSInstruction() 554 Inst.addOperand(MCOperand::createImm(Op1)); in Decode3RImmInstruction() 569 Inst.addOperand(MCOperand::createImm(Op3)); in Decode2RUSInstruction() 625 Inst.addOperand(MCOperand::createImm(Op3)); in DecodeL2RUSInstruction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 190 emitRX(Opcode, Reg0, MCOperand::createImm(Imm), IDLoc, STI); in emitRI() 202 TmpInst.addOperand(MCOperand::createImm(Imm1)); in emitII() 203 TmpInst.addOperand(MCOperand::createImm(Imm2)); in emitII() 242 emitRRX(Opcode, Reg0, Reg1, MCOperand::createImm(Imm), IDLoc, STI); in emitRRI() 253 TmpInst.addOperand(MCOperand::createImm(Imm0)); in emitRRIII() 254 TmpInst.addOperand(MCOperand::createImm(Imm1)); in emitRRIII() 255 TmpInst.addOperand(MCOperand::createImm(Imm2)); in emitRRIII() 1300 Inst.addOperand(MCOperand::createImm(SaveLocation)); in emitDirectiveCpreturn()
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