| /netbsd-src/sys/nfs/ |
| H A D | nfs_bootdhcp.c | 324 struct bootpcontext *bpc = context; in bootpcheck() local
359 if (bootp->bp_hlen != bpc->halen) { in bootpcheck()
361 bpc->halen)); in bootpcheck()
364 if (memcmp(bootp->bp_chaddr, bpc->haddr, bpc->halen)) { in bootpcheck()
368 bp_chaddr = malloc(3 * bpc->halen, M_TEMP, M_WAITOK); in bootpcheck()
369 haddr = malloc(3 * bpc->halen, M_TEMP, M_WAITOK); in bootpcheck()
372 ether_snprintf(bp_chaddr, 3 * bpc->halen, in bootpcheck()
374 ether_snprintf(haddr, 3 * bpc->halen, bpc in bootpcheck()
494 struct bootpcontext bpc; bootpc_call() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dsc/ |
| H A D | amdgpu_rc_calc.c | 36 #define table_hash(mode, bpc, max_min) ((mode << 16) | (bpc << 8) | max_min) argument
42 #define TABLE_CASE(mode, bpc, max) case (table_hash(mode, BPC_##bpc, max)): \ argument
43 table = qp_table_##mode##_##bpc##bpc_##max; \
44 …table_size = sizeof(qp_table_##mode##_##bpc##bpc_##max)/sizeof(*qp_table_##mode##_##bpc##bpc_##max…
48 void get_qp_set(qp_set qps, enum colour_mode cm, enum bits_per_comp bpc, enum max_min max_min, floa… in get_qp_set() argument
51 int sel = table_hash(mode, bpc, max_min); in get_qp_set()
180 void calc_rc_params(struct rc_params *rc, enum colour_mode cm, enum bits_per_comp bpc, float bpp, i… in calc_rc_params() argument
187 …rc->rc_quant_incr_limit0 = ((bpc == BPC_8) ? 11 : (bpc == BPC_10 ? 15 : 19)) - ((minor_version == … in calc_rc_params()
188 …rc->rc_quant_incr_limit1 = ((bpc == BPC_8) ? 11 : (bpc == BPC_10 ? 15 : 19)) - ((minor_version == … in calc_rc_params()
195 … = median3(0, (12 + (int) (0.09 * min(34, slice_height - 8))), (int)((3 * bpc * 3) - (3 * bpp_gro… in calc_rc_params()
[all …]
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| H A D | amdgpu_dc_dsc.c | 932 uint32_t bpc = 0; in dc_dsc_get_policy_for_timing() local
955 bpc = 8; in dc_dsc_get_policy_for_timing()
958 bpc = 10; in dc_dsc_get_policy_for_timing()
961 bpc = 12; in dc_dsc_get_policy_for_timing()
973 policy->max_target_bpp = 3 * bpc; in dc_dsc_get_policy_for_timing()
979 policy->max_target_bpp = bpc * 3 / 2; in dc_dsc_get_policy_for_timing()
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| H A D | amdgpu_rc_calc_dpi.c | 112 enum bits_per_comp bpc = (pps->bits_per_component == 8) ? BPC_8 : in dscc_compute_dsc_parameters() local
135 calc_rc_params(&rc, mode, bpc, bpp, slice_width, slice_height, pps->dsc_version_minor); in dscc_compute_dsc_parameters()
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| H A D | rc_calc.h | 82 void calc_rc_params(struct rc_params *rc, enum colour_mode cm, enum bits_per_comp bpc, float bpp, i…
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| /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/m32r/ |
| H A D | rte.cgs | 25 ; bpc = ret1
27 mvtc r4, bpc
45 ; test bpc = 0
46 mvfc r4, bpc
63 ; bpc = ret2 + 2
65 mvtc r4, bpc
83 ; test bpc = 42
84 mvfc r4, bpc
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| H A D | trap.cgs | 26 ; bpc = 42
28 mvtc r4, bpc
55 ; test bpc = proper return address
56 mvfc r4, bpc
73 ; bpc = 0
75 mvtc r4, bpc
97 ; test bpc = proper return address
98 mvfc r4, bpc
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| /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/cr16/ |
| H A D | excp.cgs | 26 # # bpc = 42
28 # mvtc r4, bpc
55 # # test bpc = proper return address
56 # mvfc r4, bpc
73 # # bpc = 0
75 # mvtc r4, bpc
97 # # test bpc = proper return address
98 # mvfc r4, bpc
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_connectors.c | 108 int bpc = 8; in amdgpu_connector_get_monitor_bpc() local
116 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc()
117 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
124 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc()
125 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
133 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc()
134 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
139 if (connector->display_info.bpc) in amdgpu_connector_get_monitor_bpc()
140 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
149 bpc = 6; in amdgpu_connector_get_monitor_bpc()
[all …]
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| H A D | amdgpu_atombios_crtc.c | 324 int bpc = amdgpu_crtc->bpc; in amdgpu_atombios_crtc_adjust_pll() local
365 switch (bpc) { in amdgpu_atombios_crtc_adjust_pll()
592 int bpc, in amdgpu_atombios_crtc_program_pll() argument
661 switch (bpc) { in amdgpu_atombios_crtc_program_pll()
692 switch (bpc) { in amdgpu_atombios_crtc_program_pll()
720 switch (bpc) { in amdgpu_atombios_crtc_program_pll()
763 amdgpu_crtc->bpc = 8; in amdgpu_atombios_crtc_prepare_pll()
779 amdgpu_crtc->bpc = amdgpu_connector_get_monitor_bpc(connector); in amdgpu_atombios_crtc_prepare_pll()
838 (amdgpu_crtc->bpc > 8)) in amdgpu_atombios_crtc_set_pll()
869 amdgpu_crtc->bpc, amdgpu_crtc->ss_enabled, &amdgpu_crtc->ss); in amdgpu_atombios_crtc_set_pll()
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| H A D | atombios_crtc.h | 54 int bpc,
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/ |
| H A D | radeon_connectors.c | 131 int bpc = 8; in radeon_get_monitor_bpc() local
139 if (connector->display_info.bpc) in radeon_get_monitor_bpc()
140 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc()
147 if (connector->display_info.bpc) in radeon_get_monitor_bpc()
148 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc()
156 if (connector->display_info.bpc) in radeon_get_monitor_bpc()
157 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc()
162 if (connector->display_info.bpc) in radeon_get_monitor_bpc()
163 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc()
172 bpc = 6; in radeon_get_monitor_bpc()
[all …]
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| H A D | radeon_evergreen_hdmi.c | 77 int bpc = 8; in evergreen_hdmi_update_acr() local
81 bpc = radeon_crtc->bpc; in evergreen_hdmi_update_acr()
84 if (bpc > 8) in evergreen_hdmi_update_acr()
322 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, u32 offset, int bpc) in dce4_hdmi_set_color_depth() argument
333 switch (bpc) { in dce4_hdmi_set_color_depth()
340 connector->name, bpc); in dce4_hdmi_set_color_depth()
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| H A D | radeon_audio.c | 96 u32 offset, int bpc);
654 int bpc = 8; in radeon_hdmi_set_color_depth() local
663 bpc = radeon_crtc->bpc; in radeon_hdmi_set_color_depth()
667 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc); in radeon_hdmi_set_color_depth()
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| H A D | radeon_dp_mst.c | 373 if (radeon_connector->base.display_info.bpc) in radeon_dp_mst_prepare_pll()
374 radeon_crtc->bpc = radeon_connector->base.display_info.bpc; in radeon_dp_mst_prepare_pll()
376 radeon_crtc->bpc = 8; in radeon_dp_mst_prepare_pll()
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| H A D | radeon_atombios_crtc.c | 576 int bpc = radeon_crtc->bpc; in atombios_adjust_pll() local
663 switch (bpc) { in atombios_adjust_pll()
838 int bpc, in atombios_crtc_program_pll() argument
906 switch (bpc) { in atombios_crtc_program_pll()
935 switch (bpc) { in atombios_crtc_program_pll()
977 radeon_crtc->bpc = 8; in atombios_crtc_prepare_pll()
995 radeon_crtc->bpc = radeon_get_monitor_bpc(connector); in atombios_crtc_prepare_pll()
1084 (radeon_crtc->bpc > 8)) in atombios_crtc_set_pll()
1123 radeon_crtc->bpc, radeon_crtc->ss_enabled, &radeon_crtc->ss); in atombios_crtc_set_pll()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_debugfs.c | 694 unsigned int bpc; in output_bpc_show() local
716 bpc = 6; in output_bpc_show()
719 bpc = 8; in output_bpc_show()
722 bpc = 10; in output_bpc_show()
725 bpc = 12; in output_bpc_show()
728 bpc = 16; in output_bpc_show()
734 seq_printf(m, "Current: %u\n", bpc); in output_bpc_show()
735 seq_printf(m, "Maximum: %u\n", connector->display_info.bpc); in output_bpc_show()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| H A D | intel_hdmi.c | 2216 int bpc) in hdmi_deep_color_possible() argument
2230 if (bpc == 10 && INTEL_GEN(dev_priv) < 11) in hdmi_deep_color_possible()
2233 if (crtc_state->pipe_bpp < bpc * 3) in hdmi_deep_color_possible()
2255 if (bpc == 12 && !(hdmi->y420_dc_modes & in hdmi_deep_color_possible()
2258 else if (bpc == 10 && !(hdmi->y420_dc_modes & in hdmi_deep_color_possible()
2262 if (bpc == 12 && !(info->edid_hdmi_dc_modes & in hdmi_deep_color_possible()
2265 else if (bpc == 10 && !(info->edid_hdmi_dc_modes & in hdmi_deep_color_possible()
2272 if (bpc == 12 && IS_GLK_REVID(dev_priv, 0, GLK_REVID_A1) && in hdmi_deep_color_possible()
2278 bpc == 10 && INTEL_GEN(dev_priv) >= 11 && in hdmi_deep_color_possible()
2311 static int intel_hdmi_port_clock(int clock, int bpc) in intel_hdmi_port_clock() argument
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUSearchableTables.td | 33 class GcnBufferFormatBase<bits<8> f, bits<8> bpc, bits<8> numc, bits<8> nfmt, bits<8> dfmt> {
35 bits<8> BitsPerComp = bpc;
41 …ss Gfx9BufferFormat<bits<8> f, bits<8> bpc, bits<8> numc, bits<8> nfmt, bits<8> dfmt> : GcnBufferF…
42 …x10PlusBufferFormat<bits<8> f, bits<8> bpc, bits<8> numc, bits<8> nfmt, bits<8> dfmt> : GcnBufferF…
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/ |
| H A D | drm_dp_helper.c | 426 int bpc; in drm_dp_downstream_max_bpc() local
436 bpc = port_cap[2] & DP_DS_MAX_BPC_MASK; in drm_dp_downstream_max_bpc()
438 switch (bpc) { in drm_dp_downstream_max_bpc()
484 int bpc; in drm_dp_downstream_debug() local
547 bpc = drm_dp_downstream_max_bpc(dpcd, port_cap); in drm_dp_downstream_debug()
549 if (bpc > 0) in drm_dp_downstream_debug()
550 seq_printf(m, "\t\tMax bpc: %d\n", bpc); in drm_dp_downstream_debug()
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| H A D | drm_edid.c | 4782 info->bpc = 8; in drm_parse_hdmi_deep_color_info()
4816 info->bpc = dc_bpc; in drm_parse_hdmi_deep_color_info()
4911 info->bpc = 0; in drm_reset_display_info()
4953 if (info->bpc == 0 && edid->revision == 3 && in drm_add_display_info()
4955 info->bpc = 8; in drm_add_display_info()
4957 connector->name, info->bpc); in drm_add_display_info()
4966 info->bpc = 6; in drm_add_display_info()
4969 info->bpc = 8; in drm_add_display_info()
4972 info->bpc = 10; in drm_add_display_info()
4975 info->bpc = 12; in drm_add_display_info()
[all …]
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| H A D | amdgpu_dcn20_dsc.c | 451 enum dsc_bits_per_comp bpc = DSC_BPC_UNKNOWN; in dsc_dc_color_depth_to_dsc_bits_per_comp() local
455 bpc = DSC_BPC_8; in dsc_dc_color_depth_to_dsc_bits_per_comp()
458 bpc = DSC_BPC_10; in dsc_dc_color_depth_to_dsc_bits_per_comp()
461 bpc = DSC_BPC_12; in dsc_dc_color_depth_to_dsc_bits_per_comp()
464 bpc = DSC_BPC_UNKNOWN; in dsc_dc_color_depth_to_dsc_bits_per_comp()
468 return bpc; in dsc_dc_color_depth_to_dsc_bits_per_comp()
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| /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/d10v/ |
| H A D | t-rte.s | 12 mvtc r6, bpc
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/ |
| H A D | nouveau_connector.c | 880 if (nv_connector->edid && connector->display_info.bpc) in nouveau_connector_detect_depth()
885 connector->display_info.bpc = 6; in nouveau_connector_detect_depth()
891 connector->display_info.bpc = 8; in nouveau_connector_detect_depth()
895 connector->display_info.bpc = 6; in nouveau_connector_detect_depth()
900 connector->display_info.bpc = 8; in nouveau_connector_detect_depth()
915 connector->display_info.bpc = 8; in nouveau_connector_detect_depth()
1081 clock = clock * (connector->display_info.bpc * 3) / 10; in nouveau_connector_mode_valid()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv50/ |
| H A D | nouveau_dispnv50_disp.c | 384 asyh->or.bpc = connector->display_info.bpc; in nv50_outp_atomic_check()
939 asyh->or.bpc = min(connector->display_info.bpc, 8U); in nv50_msto_atomic_check()
940 asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, asyh->or.bpc * 3, false); in nv50_msto_atomic_check()
954 nv50_dp_bpc_to_depth(unsigned int bpc) in nv50_dp_bpc_to_depth() argument
956 switch (bpc) { in nv50_dp_bpc_to_depth()
1004 nv50_dp_bpc_to_depth(armh->or.bpc)); in nv50_msto_enable()
1100 if (!mstc->connector.display_info.bpc) in nv50_mstc_get_modes()
1101 mstc->connector.display_info.bpc = 8; in nv50_mstc_get_modes()
1650 if (asyh->or.bpc == 8) in nv50_sor_enable()
1657 depth = nv50_dp_bpc_to_depth(asyh->or.bpc); in nv50_sor_enable()
[all …]
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