| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULibFunc.cpp | 382 P.ArgType = AMDGPULibFunc::I32; P.VectorSize = 4; break; in getNextParam()
384 P.ArgType = AMDGPULibFunc::U32; P.VectorSize = 4; break; in getNextParam()
386 P.ArgType = AMDGPULibFunc::F32; P.VectorSize = 4; break; in getNextParam()
405 P.VectorSize = 2; P.PtrKind = AMDGPULibFunc::BYVALUE; break; in getNextParam()
407 P.VectorSize = 3; P.PtrKind = AMDGPULibFunc::BYVALUE; break; in getNextParam()
409 P.VectorSize = 4; P.PtrKind = AMDGPULibFunc::BYVALUE; break; in getNextParam()
411 P.VectorSize = 8; P.PtrKind = AMDGPULibFunc::BYVALUE; break; in getNextParam()
413 P.VectorSize = 16; P.PtrKind = AMDGPULibFunc::BYVALUE; break; in getNextParam()
430 case AMDGPULibFunc::IMG1DA: P.VectorSize = 2; break; in getNextParam()
431 case AMDGPULibFunc::IMG1DB: P.VectorSize = 1; break; in getNextParam()
[all …]
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| H A D | AMDGPULibFunc.h | 293 unsigned char VectorSize; member
300 VectorSize = 1; in reset()
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| H A D | AMDGPULibCalls.cpp | 453 return FInfo.getLeads()[0].VectorSize; in getVecSize()
502 nf.getLeads()[0].VectorSize = FInfo.getLeads()[0].VectorSize; in sincosUseNative()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonAsmPrinter.cpp | 247 unsigned VectorSize, MCContext &Ctx) { in ScaleVectorOffset() argument
258 auto *NewCE = MCConstantExpr::create(V / int32_t(VectorSize), Ctx); in ScaleVectorOffset()
271 unsigned VectorSize = HRI.getRegSizeInBits(Hexagon::HvxVRRegClass) / 8; in HexagonProcessInstruction() local
638 MappedInst = ScaleVectorOffset(Inst, 3, VectorSize, OutContext); in HexagonProcessInstruction()
648 MappedInst = ScaleVectorOffset(Inst, 2, VectorSize, OutContext); in HexagonProcessInstruction()
656 MappedInst = ScaleVectorOffset(Inst, 2, VectorSize, OutContext); in HexagonProcessInstruction()
664 MappedInst = ScaleVectorOffset(Inst, 1, VectorSize, OutContext); in HexagonProcessInstruction()
679 MappedInst = ScaleVectorOffset(Inst, 4, VectorSize, OutContext); in HexagonProcessInstruction()
694 MappedInst = ScaleVectorOffset(Inst, 3, VectorSize, OutContext); in HexagonProcessInstruction()
711 MappedInst = ScaleVectorOffset(Inst, 3, VectorSize, OutContext); in HexagonProcessInstruction()
[all …]
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| H A D | HexagonInstrInfo.cpp | 2731 unsigned VectorSize = TRI->getSpillSize(Hexagon::HvxVRRegClass); in isValidOffset() local
2732 assert(isPowerOf2_32(VectorSize)); in isValidOffset()
2733 if (Offset & (VectorSize-1)) in isValidOffset()
2735 return isInt<4>(Offset >> Log2_32(VectorSize)); in isValidOffset()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InterleavedAccess.cpp | 442 int VectorSize = VT.getSizeInBits(); in createShuffleStride() local
444 int LaneCount = std::max(VectorSize / 128, 1); in createShuffleStride()
455 int VectorSize = VT.getSizeInBits(); in setGroupSize() local
456 int VF = VT.getVectorNumElements() / std::max(VectorSize / 128, 1); in setGroupSize()
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| /netbsd-src/external/apache2/llvm/dist/clang/utils/TableGen/ |
| H A D | NeonEmitter.cpp | 1595 int64_t VectorSize = cast<IntInit>(Expr->getArg(0))->getValue(); in emitDagShuffle() local
1596 VectorSize /= ElementSize; in emitDagShuffle()
1599 for (unsigned VI = 0; VI < Elts2.size(); VI += VectorSize) { in emitDagShuffle()
1600 for (int LI = VectorSize - 1; LI >= 0; --LI) { in emitDagShuffle()
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/Sema/ |
| H A D | SemaDeclAttr.cpp | 4161 llvm::APInt VectorSize(64, 0); in AddModeAttr() local
4170 !Str.substr(1, VectorStringLength).getAsInteger(10, VectorSize) && in AddModeAttr()
4171 VectorSize.isPowerOf2()) { in AddModeAttr()
4178 VectorSize = 0; in AddModeAttr()
4182 if (!VectorSize) in AddModeAttr()
4222 VectorSize.getBoolValue()) { in AddModeAttr()
4262 if (VectorSize.getBoolValue()) { in AddModeAttr()
4263 NewTy = Context.getVectorType(NewTy, VectorSize.getZExtValue(), in AddModeAttr()
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| H A D | TreeTransform.h | 14274 IntegerLiteral *VectorSize in RebuildExtVectorType() local
14277 return SemaRef.BuildExtVectorType(ElementType, VectorSize, AttributeLoc); in RebuildExtVectorType()
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 6255 int VectorSize = 0; in LookupNeonLLVMIntrinsic() local
6257 VectorSize = 64; in LookupNeonLLVMIntrinsic()
6259 VectorSize = 128; in LookupNeonLLVMIntrinsic()
6267 Ty, VectorSize ? VectorSize / Ty->getPrimitiveSizeInBits() : 1); in LookupNeonLLVMIntrinsic()
6274 int Elts = VectorSize ? VectorSize / ArgType->getPrimitiveSizeInBits() : 1; in LookupNeonLLVMIntrinsic()
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| /netbsd-src/external/apache2/llvm/dist/llvm/bindings/go/llvm/ |
| H A D | ir.go | 691 func (t Type) VectorSize() int { return int(C.LLVMGetVectorSize(t.C)) } func
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| /netbsd-src/external/apache2/llvm/dist/clang/include/clang/Basic/ |
| H A D | Attr.td | 2749 def VectorSize : TypeAttr {
|