| /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/mips/ |
| H A D | r6-removed.csv | 60 SWR,0xb8000000
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| /netbsd-src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| H A D | kirkwood-mv88f6281gtw-ge.dts | 100 label = "SWR Button";
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 241 case Mips::SWR: in isBasePlusOffsetMemoryAccess()
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| /netbsd-src/external/gpl3/gdb/dist/sim/erc32/ |
| H A D | README.erc32 | 128 1 SWR Soft reset enable
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| /netbsd-src/external/gpl3/gdb.old/dist/sim/erc32/ |
| H A D | README.erc32 | 128 1 SWR Soft reset enable
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrHFP.td | 164 def SWR : BinaryRR<"swr", 0x2F, null_frag, FP64, FP64>;
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | CodeGenSchedule.cpp | 1906 for (Record *SWR : SWRDefs) { in collectProcResources()
1907 Record *ModelDef = SWR->getValueAsDef("SchedModel"); in collectProcResources()
1908 addWriteRes(SWR, getProcModel(ModelDef).Index); in collectProcResources()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.h | 248 SWR, enumerator
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| H A D | MipsInstructionSelector.cpp | 473 if (!buildUnalignedStore(I, Mips::SWR, BaseAddr, SignedOffset, MMO)) in select()
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| H A D | MipsISelLowering.cpp | 227 case MipsISD::SWR: return "MipsISD::SWR"; in getTargetNodeName()
2760 return createStoreLR(MipsISD::SWR, DAG, SD, SWL, IsLittle ? 0 : 3); in lowerUnalignedIntStore()
4898 BuildMI(*BB, I, DL, TII->get(Mips::SWR)) in emitSTR_W()
4982 BuildMI(*BB, I, DL, TII->get(Mips::SWR)) in emitSTR_D()
4990 BuildMI(*BB, I, DL, TII->get(Mips::SWR)) in emitSTR_D()
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| H A D | MipsScheduleP5600.td | 144 SBE, SHE, SWE, SCE, SWL, SWR, SWLE, SWRE)>;
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| H A D | MipsScheduleGeneric.td | 576 def : InstRW<[GenericWriteStore], (instrs SWL, SWR)>;
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| H A D | MipsInstrInfo.td | 144 def MipsSWR : SDNode<"MipsISD::SWR", SDTStore,
2128 def SWR : MMRel, StoreLeftRight<"swr", MipsSWR, GPR32Opnd, II_SWR>, LW_FM<0x2e>,
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| /netbsd-src/sys/arch/mips/mips/ |
| H A D | bds_emul.S | 136 PTR_WORD _C_LABEL(mips_emul_swr) # 056 SWR
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4520 unsigned XWR = IsLoadInst ? Mips::LWR : Mips::SWR; in expandUxw()
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| /netbsd-src/external/gpl3/gdb/dist/sim/mips/ |
| H A D | ChangeLog-2021 | 2946 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
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| /netbsd-src/etc/ |
| H A D | services | 8193 swr-port 3491/tcp # SWR Port [Ian_Manning] …
8194 swr-port 3491/udp # SWR Port [Ian_Manning] …
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