Home
last modified time | relevance | path

Searched refs:Opcodes (Results 1 – 25 of 177) sorted by relevance

12345678

/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-readobj/
H A DARMWinEHPrinter.h38 bool opcode_0xxxxxxx(const uint8_t *Opcodes, unsigned &Offset,
40 bool opcode_10Lxxxxx(const uint8_t *Opcodes, unsigned &Offset,
42 bool opcode_1100xxxx(const uint8_t *Opcodes, unsigned &Offset,
44 bool opcode_11010Lxx(const uint8_t *Opcodes, unsigned &Offset,
46 bool opcode_11011Lxx(const uint8_t *Opcodes, unsigned &Offset,
48 bool opcode_11100xxx(const uint8_t *Opcodes, unsigned &Offset,
50 bool opcode_111010xx(const uint8_t *Opcodes, unsigned &Offset,
52 bool opcode_1110110L(const uint8_t *Opcodes, unsigned &Offset,
54 bool opcode_11101110(const uint8_t *Opcodes, unsigned &Offset,
56 bool opcode_11101111(const uint8_t *Opcodes, unsigned &Offset,
[all …]
H A DARMEHABIPrinter.h34 void (OpcodeDecoder::*Routine)(const uint8_t *Opcodes, unsigned &OI);
38 void Decode_00xxxxxx(const uint8_t *Opcodes, unsigned &OI);
39 void Decode_01xxxxxx(const uint8_t *Opcodes, unsigned &OI);
40 void Decode_1000iiii_iiiiiiii(const uint8_t *Opcodes, unsigned &OI);
41 void Decode_10011101(const uint8_t *Opcodes, unsigned &OI);
42 void Decode_10011111(const uint8_t *Opcodes, unsigned &OI);
43 void Decode_1001nnnn(const uint8_t *Opcodes, unsigned &OI);
44 void Decode_10100nnn(const uint8_t *Opcodes, unsigned &OI);
45 void Decode_10101nnn(const uint8_t *Opcodes, unsigned &OI);
46 void Decode_10110000(const uint8_t *Opcodes, unsigned &OI);
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InstrFMA3Info.h26 uint16_t Opcodes[3]; member
56 return Opcodes[Form132]; in get132Opcode()
61 return Opcodes[Form213]; in get213Opcode()
66 return Opcodes[Form231]; in get231Opcode()
86 return Opcodes[0] < RHS.Opcodes[0];
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp128 } const Opcodes; member in __anon23aef0430111::ARMInstructionSelector
175 TRI(*STI.getRegisterInfo()), TM(TM), RBI(RBI), STI(STI), Opcodes(STI), in ARMInstructionSelector()
347 return Size == 8 ? Opcodes.SEXT8 : Opcodes.SEXT16; in selectSimpleExtOpc()
350 return Size == 8 ? Opcodes.ZEXT8 : Opcodes.ZEXT16; in selectSimpleExtOpc()
364 return isStore ? Opcodes.STORE8 : Opcodes.LOAD8; in selectLoadStoreOpCode()
366 return isStore ? Opcodes.STORE16 : Opcodes.LOAD16; in selectLoadStoreOpCode()
368 return isStore ? Opcodes.STORE32 : Opcodes.LOAD32; in selectLoadStoreOpCode()
494 (void)BuildMI(I.MBB, I.InsertBefore, I.DbgLoc, TII.get(Opcodes.MOVi)) in putConstant()
674 : Opcodes.MOV_ga_pcrel) in selectGlobal()
676 : Opcodes.LDRLIT_ga_pcrel); in selectGlobal()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/
H A DSerialSnippetGenerator.cpp42 std::vector<unsigned> Opcodes; in computeAliasingInstructions() local
43 Opcodes.resize(State.getInstrInfo().getNumOpcodes()); in computeAliasingInstructions()
44 std::iota(Opcodes.begin(), Opcodes.end(), 0U); in computeAliasingInstructions()
45 llvm::shuffle(Opcodes.begin(), Opcodes.end(), randomGenerator()); in computeAliasingInstructions()
48 for (const unsigned OtherOpcode : Opcodes) { in computeAliasingInstructions()
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-objcopy/MachO/
H A DMachOWriter.cpp54 assert((DyLdInfoCommand.rebase_size == O.Rebases.Opcodes.size()) && in totalSize()
59 assert((DyLdInfoCommand.bind_size == O.Binds.Opcodes.size()) && in totalSize()
64 assert((DyLdInfoCommand.weak_bind_size == O.WeakBinds.Opcodes.size()) && in totalSize()
70 assert((DyLdInfoCommand.lazy_bind_size == O.LazyBinds.Opcodes.size()) && in totalSize()
335 assert((DyLdInfoCommand.rebase_size == O.Rebases.Opcodes.size()) && in writeRebaseInfo()
337 memcpy(Out, O.Rebases.Opcodes.data(), O.Rebases.Opcodes.size()); in writeRebaseInfo()
347 assert((DyLdInfoCommand.bind_size == O.Binds.Opcodes.size()) && in writeBindInfo()
349 memcpy(Out, O.Binds.Opcodes.data(), O.Binds.Opcodes.size()); in writeBindInfo()
359 assert((DyLdInfoCommand.weak_bind_size == O.WeakBinds.Opcodes.size()) && in writeWeakBindInfo()
361 memcpy(Out, O.WeakBinds.Opcodes.data(), O.WeakBinds.Opcodes.size()); in writeWeakBindInfo()
[all …]
H A DMachOLayoutBuilder.cpp246 uint64_t StartOfBindingInfo = StartOfRebaseInfo + O.Rebases.Opcodes.size(); in layoutTail()
247 uint64_t StartOfWeakBindingInfo = StartOfBindingInfo + O.Binds.Opcodes.size(); in layoutTail()
249 StartOfWeakBindingInfo + O.WeakBinds.Opcodes.size(); in layoutTail()
251 StartOfLazyBindingInfo + O.LazyBinds.Opcodes.size(); in layoutTail()
331 O.Rebases.Opcodes.empty() ? 0 : StartOfRebaseInfo; in layoutTail()
332 MLC.dyld_info_command_data.rebase_size = O.Rebases.Opcodes.size(); in layoutTail()
334 O.Binds.Opcodes.empty() ? 0 : StartOfBindingInfo; in layoutTail()
335 MLC.dyld_info_command_data.bind_size = O.Binds.Opcodes.size(); in layoutTail()
337 O.WeakBinds.Opcodes.empty() ? 0 : StartOfWeakBindingInfo; in layoutTail()
338 MLC.dyld_info_command_data.weak_bind_size = O.WeakBinds.Opcodes.size(); in layoutTail()
[all …]
H A DObject.h215 ArrayRef<uint8_t> Opcodes; member
231 ArrayRef<uint8_t> Opcodes; member
249 ArrayRef<uint8_t> Opcodes; member
262 ArrayRef<uint8_t> Opcodes; member
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Object/
H A DMachOObjectFile.cpp3141 : E(E), O(O), Opcodes(Bytes), Ptr(Bytes.begin()), in MachORebaseEntry()
3145 Ptr = Opcodes.begin(); in moveToFirst()
3150 Ptr = Opcodes.end(); in moveToEnd()
3166 if (Ptr == Opcodes.end()) { in moveNext()
3191 Twine::utohexstr(OpcodeStart - Opcodes.begin())); in moveNext()
3206 Twine::utohexstr(OpcodeStart - Opcodes.begin())); in moveNext()
3215 Twine::utohexstr(OpcodeStart - Opcodes.begin())); in moveNext()
3231 Twine::utohexstr(OpcodeStart - Opcodes.begin())); in moveNext()
3240 Twine::utohexstr(OpcodeStart - Opcodes.begin())); in moveNext()
3256 Twine::utohexstr(OpcodeStart - Opcodes.begin())); in moveNext()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMUnwindOpAsm.h62 void EmitRaw(const SmallVectorImpl<uint8_t> &Opcodes) { in EmitRaw() argument
63 Ops.insert(Ops.end(), Opcodes.begin(), Opcodes.end()); in EmitRaw()
64 OpBegins.push_back(OpBegins.back() + Opcodes.size()); in EmitRaw()
H A DARMELFStreamer.cpp88 const SmallVectorImpl<uint8_t> &Opcodes) override;
266 const SmallVectorImpl<uint8_t> &Opcodes) { in emitUnwindRaw() argument
268 for (SmallVectorImpl<uint8_t>::const_iterator OCI = Opcodes.begin(), in emitUnwindRaw()
269 OCE = Opcodes.end(); in emitUnwindRaw()
392 const SmallVectorImpl<uint8_t> &Opcodes) override;
460 void emitUnwindRaw(int64_t Offset, const SmallVectorImpl<uint8_t> &Opcodes);
722 SmallVector<uint8_t, 64> Opcodes; member in __anonf133901f0111::ARMELFStreamer
767 const SmallVectorImpl<uint8_t> &Opcodes) { in emitUnwindRaw() argument
768 getStreamer().emitUnwindRaw(Offset, Opcodes); in emitUnwindRaw()
1268 Opcodes.clear(); in EHReset()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DPredicateExpander.cpp118 const RecVec &Opcodes) { in expandCheckOpcode() argument
119 assert(!Opcodes.empty() && "Expected at least one opcode to check!"); in expandCheckOpcode()
122 if (Opcodes.size() == 1) { in expandCheckOpcode()
124 expandCheckOpcode(OS, Opcodes[0]); in expandCheckOpcode()
131 for (const Record *Rec : Opcodes) { in expandCheckOpcode()
148 const RecVec &Opcodes) { in expandCheckPseudo() argument
152 expandCheckOpcode(OS, Opcodes); in expandCheckPseudo()
242 const RecVec &Opcodes = Rec->getValueAsListOfDefs("Opcodes"); in expandOpcodeSwitchCase() local
243 for (const Record *Opcode : Opcodes) { in expandOpcodeSwitchCase()
/netbsd-src/external/apache2/llvm/dist/clang/lib/AST/
H A DCMakeLists.txt11 clang_tablegen(Opcodes.inc
13 SOURCE Interp/Opcodes.td
14 TARGET Opcodes)
121 Opcodes
/netbsd-src/external/gpl3/binutils/dist/gas/doc/
H A Dc-visium.texi21 * Visium Opcodes:: Opcodes
80 @node Visium Opcodes
81 @section Opcodes
H A Dc-wasm32.texi22 * WebAssembly-Opcodes:: Opcodes
95 @node WebAssembly-Opcodes
96 @section Regular Opcodes
103 Opcodes are written directly in the order in which they are encoded,
H A Dc-xstormy16.texi12 * XStormy16 Opcodes:: Pseudo-Opcodes
70 @node XStormy16 Opcodes
71 @section XStormy16 Pseudo-Opcodes
H A Dc-pru.texi17 * PRU Opcodes:: Opcodes
136 @node PRU Opcodes
137 @section Opcodes
H A Dc-lm32.texi20 * LM32 Opcodes:: Opcodes
222 @node LM32 Opcodes
223 @section Opcodes
/netbsd-src/external/gpl3/binutils.old/dist/gas/doc/
H A Dc-visium.texi21 * Visium Opcodes:: Opcodes
80 @node Visium Opcodes
81 @section Opcodes
H A Dc-wasm32.texi22 * WebAssembly-Opcodes:: Opcodes
95 @node WebAssembly-Opcodes
96 @section Regular Opcodes
103 Opcodes are written directly in the order in which they are encoded,
H A Dc-xstormy16.texi12 * XStormy16 Opcodes:: Pseudo-Opcodes
70 @node XStormy16 Opcodes
71 @section XStormy16 Pseudo-Opcodes
H A Dc-pru.texi17 * PRU Opcodes:: Opcodes
136 @node PRU Opcodes
137 @section Opcodes
H A Dc-lm32.texi20 * LM32 Opcodes:: Opcodes
222 @node LM32 Opcodes
223 @section Opcodes
/netbsd-src/external/apache2/llvm/dist/llvm/utils/gn/secondary/clang/lib/AST/
H A DBUILD.gn3 clang_tablegen("Opcodes") {
6 td_file = "Interp/Opcodes.td"
13 ":Opcodes",
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerInfo.cpp443 std::initializer_list<unsigned> Opcodes) { in getActionDefinitionsBuilder() argument
444 unsigned Representative = *Opcodes.begin(); in getActionDefinitionsBuilder()
446 assert(!llvm::empty(Opcodes) && Opcodes.begin() + 1 != Opcodes.end() && in getActionDefinitionsBuilder()
449 for (unsigned Op : llvm::drop_begin(Opcodes)) in getActionDefinitionsBuilder()

12345678