| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 75 bool expandArith(unsigned OpLo, unsigned OpHi, Block &MBB, BlockIt MBBI);
142 expandArith(unsigned OpLo, unsigned OpHi, Block &MBB, BlockIt MBBI) { in expandArith() argument
159 auto MIBHI = buildMI(MBB, MBBI, OpHi) in expandArith()
337 unsigned OpHi = AVR::SBCIRdK; in expand() local
348 auto MIBHI = buildMI(MBB, MBBI, OpHi) in expand()
397 unsigned OpHi = AVR::COMRd; in expand() local
407 auto MIBHI = buildMI(MBB, MBBI, OpHi) in expand()
466 unsigned OpHi = AVR::CPCRdRr; in expand() local
475 auto MIBHI = buildMI(MBB, MBBI, OpHi) in expand()
499 unsigned OpHi = AVR::CPCRdRr; in expand() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 1969 const MachineOperand &OpHi = LoIs1 ? MI.getOperand(3) : MI.getOperand(1); in evaluate() local
1971 RegisterSubReg SrcRL(OpLo), SrcRH(OpHi); in evaluate()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1433 SDValue OpHi = Op; in SplitVecRes_StrictFPOp() local
1440 GetSplitVector(Op, OpLo, OpHi); in SplitVecRes_StrictFPOp()
1442 std::tie(OpLo, OpHi) = DAG.SplitVectorOperand(N, i); in SplitVecRes_StrictFPOp()
1446 OpsHi[i] = OpHi; in SplitVecRes_StrictFPOp()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 4420 SDValue OpHi = DAG.getNode(Opc, SL, Hi.getValueType(), Hi, in splitUnaryVectorOp() local
4423 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitUnaryVectorOp()
4444 SDValue OpHi = DAG.getNode(Opc, SL, Hi0.getValueType(), Hi0, Hi1, in splitBinaryVectorOp() local
4447 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitBinaryVectorOp()
4468 SDValue OpHi = DAG.getNode(Opc, SL, Hi0.getValueType(), Hi0, Hi1, Hi2, in splitTernaryVectorOp() local
4471 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitTernaryVectorOp()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 20793 SDValue OpHi = getUnpackh(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef); in LowerAVXExtend() local
20794 OpHi = DAG.getBitcast(HalfVT, OpHi); in LowerAVXExtend()
20796 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi); in LowerAVXExtend()
21162 SDValue OpHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v4i32, In, in LowerTRUNCATE() local
21165 return DAG.getVectorShuffle(VT, DL, OpLo, OpHi, ShufMask); in LowerTRUNCATE()
21190 SDValue OpHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v16i8, In, in LowerTRUNCATE() local
21198 OpHi = DAG.getVectorShuffle(MVT::v16i8, DL, OpHi, OpHi, ShufMask1); in LowerTRUNCATE()
21201 OpHi = DAG.getBitcast(MVT::v4i32, OpHi); in LowerTRUNCATE()
21205 SDValue res = DAG.getVectorShuffle(MVT::v4i32, DL, OpLo, OpHi, ShufMask2); in LowerTRUNCATE()
24138 SDValue OpHi = DAG.getVectorShuffle(InVT, dl, In, In, ShufMask); in LowerSIGN_EXTEND() local
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