| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiInstPrinter.cpp | 227 const MCOperand &OffsetOp, in printMemoryImmediateOffset() argument
229 assert((OffsetOp.isImm() || OffsetOp.isExpr()) && "Immediate expected"); in printMemoryImmediateOffset()
230 if (OffsetOp.isImm()) { in printMemoryImmediateOffset()
231 assert(isInt<SizeInBits>(OffsetOp.getImm()) && "Constant value truncated"); in printMemoryImmediateOffset()
232 OS << OffsetOp.getImm(); in printMemoryImmediateOffset()
234 OffsetOp.getExpr()->print(OS, &MAI); in printMemoryImmediateOffset()
241 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRiOperand() local
246 printMemoryImmediateOffset<16>(MAI, OffsetOp, OS); in printMemRiOperand()
256 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRrOperand() local
259 assert(OffsetOp.isReg() && RegOp.isReg() && "Registers expected."); in printMemRrOperand()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRInstPrinter.cpp | 177 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemri() local
183 if (OffsetOp.isImm()) { in printMemri()
184 int64_t Offset = OffsetOp.getImm(); in printMemri()
190 } else if (OffsetOp.isExpr()) { in printMemri()
191 O << *OffsetOp.getExpr(); in printMemri()
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| H A D | AVRMCCodeEmitter.cpp | 138 auto OffsetOp = MI.getOperand(OpNo + 1); in encodeMemri() local
157 if (OffsetOp.isImm()) { in encodeMemri()
158 OffsetBits = OffsetOp.getImm(); in encodeMemri()
159 } else if (OffsetOp.isExpr()) { in encodeMemri()
161 Fixups.push_back(MCFixup::create(0, OffsetOp.getExpr(), in encodeMemri()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFInstPrinter.cpp | 68 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemOperand() local
75 if (OffsetOp.isImm()) { in printMemOperand()
76 auto Imm = OffsetOp.getImm(); in printMemOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegisterInfo.cpp | 123 Register OffsetOp = MRI.createVirtualRegister(PtrRC); in eliminateFrameIndex() local
126 OffsetOp) in eliminateFrameIndex()
133 .addReg(OffsetOp); in eliminateFrameIndex()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 162 const MachineOperand &OffsetOp = MI.getOperand(3); in canRemoveAddasl() local
163 if (!OffsetOp.isImm() || OffsetOp.getImm() > 3) in canRemoveAddasl()
369 MachineOperand OffsetOp = MID.mayLoad() ? MI->getOperand(2) in processAddUses() local
371 if (!OffsetOp.isImm()) in processAddUses()
374 int64_t newOffset = OffsetOp.getImm() + AddMI->getOperand(2).getImm(); in processAddUses()
420 MachineOperand &OffsetOp = MID.mayLoad() ? UseMI->getOperand(2) in updateAddUses() local
425 OffsetOp.setImm(ImmOp.getImm() + OffsetOp.getImm()); in updateAddUses()
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| H A D | HexagonInstrInfo.cpp | 1962 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); in getIncrementValue() local
1963 if (OffsetOp.isImm()) { in getIncrementValue()
1964 Value = OffsetOp.getImm(); in getIncrementValue()
3211 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); in getBaseAndOffset() local
3212 if (!OffsetOp.isImm()) in getBaseAndOffset()
3214 Offset = OffsetOp.getImm(); in getBaseAndOffset()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 742 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset); in resolveFrameIndex() local
743 int64_t NewOffset = OffsetOp->getImm() + Offset; in resolveFrameIndex()
753 OffsetOp->setImm(NewOffset); in resolveFrameIndex()
766 OffsetOp->setImm(NewOffset); in resolveFrameIndex()
1633 MachineOperand *OffsetOp = in eliminateFrameIndex() local
1635 int64_t NewOffset = Offset + OffsetOp->getImm(); in eliminateFrameIndex()
1638 OffsetOp->setImm(NewOffset); in eliminateFrameIndex()
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| H A D | SIInstrInfo.cpp | 253 const MachineOperand *BaseOp, *OffsetOp; in getMemOperandsWithOffsetWidth() local
258 OffsetOp = getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandsWithOffsetWidth()
259 if (OffsetOp) { in getMemOperandsWithOffsetWidth()
267 Offset = OffsetOp->getImm(); in getMemOperandsWithOffsetWidth()
368 OffsetOp = getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOperandsWithOffsetWidth()
369 Offset = OffsetOp ? OffsetOp->getImm() : 0; in getMemOperandsWithOffsetWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineVerifier.cpp | 1320 const MachineOperand &OffsetOp = MI->getOperand(2); in verifyPreISelGenericInstruction() local
1321 if (!OffsetOp.isImm()) { in verifyPreISelGenericInstruction()
1331 if (DstSize + OffsetOp.getImm() > SrcSize) in verifyPreISelGenericInstruction()
1342 const MachineOperand &OffsetOp = MI->getOperand(3); in verifyPreISelGenericInstruction() local
1343 if (!OffsetOp.isImm()) { in verifyPreISelGenericInstruction()
1354 if (SrcSize + OffsetOp.getImm() > DstSize) in verifyPreISelGenericInstruction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3687 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem16Inst() local
3717 if (OffsetOp.isImm()) { in expandMem16Inst()
3718 int64_t LoOffset = OffsetOp.getImm() & 0xffff; in expandMem16Inst()
3719 int64_t HiOffset = OffsetOp.getImm() & ~0xffff; in expandMem16Inst()
3729 bool Is32BitImm = isInt<32>(OffsetOp.getImm()); in expandMem16Inst()
3742 if (OffsetOp.isExpr()) { in expandMem16Inst()
3751 if (!OffsetOp.getExpr()->evaluateAsRelocatable(Res, nullptr, nullptr)) { in expandMem16Inst()
3769 const MCExpr *OffExpr = OffsetOp.getExpr(); in expandMem16Inst()
3814 const MCOperand &OffsetOp = Inst.getOperand(StartOp + 2); in expandMem9Inst() local
3845 if (OffsetOp.isImm()) { in expandMem9Inst()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 1751 const MachineOperand &OffsetOp = Pop->getOperand(Pop->getNumOperands() - 1); in emitEpilogue() local
1755 if (OffsetOp.getImm() == 0 && AfterCSRPopSize >= 0) in emitEpilogue()
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| H A D | AArch64ISelDAGToDAG.cpp | 1338 ConstantSDNode *OffsetOp = cast<ConstantSDNode>(LD->getOffset()); in tryIndexedLoad() local
1339 int OffsetVal = (int)OffsetOp->getZExtValue(); in tryIndexedLoad()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 7259 SDValue OffsetOp) { in InferPointerInfo() argument
7261 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) in InferPointerInfo()
7263 if (OffsetOp.isUndef()) in InferPointerInfo()
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