Searched refs:OffsetImm (Results 1 – 6 of 6) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 850 const MCExpr *OffsetImm; // Offset immediate value member 1108 if(!Memory.OffsetImm || Memory.OffsetRegNum) return false; in isThumbMemPC() 1110 if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) in isThumbMemPC() 1455 return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr && in isMemNoOffset() 1467 return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr && in isMemNoOffsetT2() 1479 return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr && in isMemNoOffsetT2NoSp() 1491 return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr && in isMemNoOffsetT() 1501 if (!Memory.OffsetImm) return true; in isMemPCRelImm12() 1502 if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) { in isMemPCRelImm12() 1589 if (!Memory.OffsetImm) return true; in isAddrMode2() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | Thumb2SizeReduction.cpp | 580 unsigned OffsetImm = 0; in ReduceLoadStore() local 582 OffsetImm = MI->getOperand(2).getImm(); in ReduceLoadStore() 585 if ((OffsetImm & (Scale - 1)) || OffsetImm > MaxOffset) in ReduceLoadStore() 604 MIB.addImm(OffsetImm / Scale); in ReduceLoadStore()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64LoadStoreOptimizer.cpp | 776 int OffsetImm = getLdStOffsetOp(*RtMI).getImm(); in mergeNarrowZeroStores() local 779 assert(((OffsetImm & 1) == 0) && "Unexpected offset to merge"); in mergeNarrowZeroStores() 780 OffsetImm /= 2; in mergeNarrowZeroStores() 790 .addImm(OffsetImm) in mergeNarrowZeroStores() 977 int OffsetImm = getLdStOffsetOp(*RtMI).getImm(); in mergePairedInsns() local 980 assert(!(OffsetImm % TII->getMemScale(*RtMI)) && in mergePairedInsns() 982 OffsetImm /= TII->getMemScale(*RtMI); in mergePairedInsns() 1021 .addImm(OffsetImm) in mergePairedInsns()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 3439 int64_t OffsetImm = 0; in foldFrameOffset() local 3444 if (!isImmInstrEligibleForFolding(MI, ToBeDeletedReg, XFormOpcode, OffsetImm, in foldFrameOffset() 3467 if (isValidToBeChangedReg(ADDMI, 1, ADDIMI, OffsetAddi, OffsetImm)) in foldFrameOffset() 3469 else if (isValidToBeChangedReg(ADDMI, 2, ADDIMI, OffsetAddi, OffsetImm)) in foldFrameOffset() 3506 ADDIMI->getOperand(2).setImm(OffsetAddi + OffsetImm); in foldFrameOffset() 3553 int64_t &OffsetImm, in isImmInstrEligibleForFolding() argument 3588 OffsetImm = ImmOperand.getImm(); in isImmInstrEligibleForFolding() 3596 int64_t OffsetImm) const { in isValidToBeChangedReg() 3630 if (isInt<16>(OffsetAddi + OffsetImm)) in isValidToBeChangedReg()
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| H A D | PPCInstrInfo.h | 617 int64_t OffsetImm) const;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 326 const MachineOperand *OffsetImm = in getMemOperandsWithOffsetWidth() local 328 Offset = OffsetImm->getImm(); in getMemOperandsWithOffsetWidth()
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