| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | StackMaps.h | 174 NumDefs = MI->getNumDefs(); in StatepointOpers() 178 unsigned getIDPos() const { return NumDefs + IDPos; } in getIDPos() 181 unsigned getNBytesPos() const { return NumDefs + NBytesPos; } in getNBytesPos() 184 unsigned getNCallArgsPos() const { return NumDefs + NCallArgsPos; } in getNCallArgsPos() 189 return MI->getOperand(NumDefs + NCallArgsPos).getImm() + MetaEnd + NumDefs; in getVarIdx() 204 uint64_t getID() const { return MI->getOperand(NumDefs + IDPos).getImm(); } in getID() 208 return MI->getOperand(NumDefs + NBytesPos).getImm(); in getNumPatchBytes() 213 return MI->getOperand(NumDefs + CallTargetPos); in getCallTarget() 248 unsigned NumDefs; variable
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 364 const unsigned NumDefs = MI.getNumOperands() - 1; in tryFoldUnmergeCast() local 369 const LLT SrcTy = MRI.getType(MI.getOperand(NumDefs).getReg()); in tryFoldUnmergeCast() 386 DestTy.isVector() ? CastSrcTy.getNumElements() / NumDefs : 1; in tryFoldUnmergeCast() 396 for (unsigned I = 0; I != NumDefs; ++I) { in tryFoldUnmergeCast() 427 if (Idx < NumDefs) in tryFoldUnmergeCast() 541 unsigned NumDefs = MI.getNumOperands() - 1; in tryCombineUnmergeValues() local 542 Register SrcReg = MI.getOperand(NumDefs).getReg(); in tryCombineUnmergeValues() 547 LLT OpTy = MRI.getType(MI.getOperand(NumDefs).getReg()); in tryCombineUnmergeValues() 585 for (unsigned I = 0; I != NumDefs; ++I) { in tryCombineUnmergeValues() 587 replaceRegOrBuildCopy(Def, NewUnmerge.getReg(SrcDefIdx * NumDefs + I), in tryCombineUnmergeValues() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | AsmPrinterInlineAsm.cpp | 461 unsigned NumDefs = 0; in emitInlineAsm() local 462 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef(); in emitInlineAsm() 463 ++NumDefs) in emitInlineAsm() 464 assert(NumDefs != MI->getNumOperands()-2 && "No asm string?"); in emitInlineAsm() 466 assert(MI->getOperand(NumDefs).isSymbol() && "No asm string?"); in emitInlineAsm() 469 const char *AsmStr = MI->getOperand(NumDefs).getSymbolName(); in emitInlineAsm()
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | CodeGenInstruction.cpp | 43 NumDefs = OutDI->getNumArgs(); in CGIOperandList() 63 if (i < NumDefs) { in CGIOperandList() 67 ArgInit = InDI->getArg(i-NumDefs); in CGIOperandList() 68 ArgName = InDI->getArgNameStr(i-NumDefs); in CGIOperandList() 113 if (i < NumDefs) in CGIOperandList() 144 --NumDefs; in CGIOperandList() 294 if (DestOp.first >= Ops.NumDefs) in ParseConstraint() 298 if (SrcOp.first < Ops.NumDefs) in ParseConstraint()
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| H A D | InstrDocsEmitter.cpp | 152 bool IsDef = i < II->Operands.NumDefs; in EmitInstrDocs()
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| H A D | CodeGenInstruction.h | 145 unsigned NumDefs; variable
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| H A D | GlobalISelEmitter.cpp | 4711 const unsigned NumDefs = DstI->Operands.NumDefs; in importExplicitDefRenderers() local 4712 if (NumDefs == 0) in importExplicitDefRenderers() 4719 if (Dst->getExtTypes().size() < NumDefs) in importExplicitDefRenderers() 4724 for (unsigned I = 1; I < NumDefs; ++I) { in importExplicitDefRenderers() 4835 unsigned DstINumUses = OrigDstI->Operands.size() - OrigDstI->Operands.NumDefs; in importExplicitUseRenderers() 4843 unsigned NumResults = OrigDstI->Operands.NumDefs; in importExplicitUseRenderers() 4870 unsigned InstOpNo = DstI->Operands.NumDefs + I; in importExplicitUseRenderers() 5001 if (Inst.Operands.NumDefs > 1) in inferRegClassFromPattern() 5191 if (DstI.Operands.NumDefs < Src->getExtTypes().size()) in runOnPattern() 5194 to_string(DstI.Operands.NumDefs) + " def(s))"); in runOnPattern()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 904 unsigned NumDefs = II.getNumDefs(); in EmitMachineNode() local 915 NumDefs = NumResults; in EmitMachineNode() 919 NumDefs = NumResults; in EmitMachineNode() 924 countOperands(Node, II.getNumOperands() - NumDefs, NumImpUses); in EmitMachineNode() 927 bool HasPhysRegOuts = NumResults > NumDefs && in EmitMachineNode() 988 bool HasOptPRefs = NumDefs > NumResults; in EmitMachineNode() 991 unsigned NumSkip = HasOptPRefs ? NumDefs - NumResults : 0; in EmitMachineNode() 993 AddOperand(MIB, Node->getOperand(i), i-NumSkip+NumDefs, &II, in EmitMachineNode() 1030 for (unsigned i = NumDefs; i < NumResults; ++i) { in EmitMachineNode() 1031 Register Reg = II.getImplicitDefs()[i - NumDefs]; in EmitMachineNode() [all …]
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| H A D | ScheduleDAGRRList.cpp | 2117 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in MayReduceRegPressure() local 2118 for (unsigned i = 0; i != NumDefs; ++i) { in MayReduceRegPressure() 2163 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in RegPressureDiff() local 2164 for (unsigned i = 0; i != NumDefs; ++i) { in RegPressureDiff() 2292 unsigned NumDefs = TII->get(PN->getMachineOpcode()).getNumDefs(); in unscheduledNode() local 2293 for (unsigned i = 0; i != NumDefs; ++i) { in unscheduledNode() 2309 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in unscheduledNode() local 2310 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { in unscheduledNode() 2880 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in canClobberPhysRegDefs() local 2892 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { in canClobberPhysRegDefs() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/GlobalISel/ |
| H A D | GIMatchDagOperands.cpp | 81 i < I.Operands.NumDefs); in makeOperandList() 92 NewValue->add(I.Operands[i].Name, i, i < I.Operands.NumDefs); in makeOperandList()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | ImplicitNullChecks.cpp | 715 unsigned NumDefs = MI->getDesc().getNumDefs(); in insertFaultingInstr() local 716 assert(NumDefs <= 1 && "other cases unhandled!"); in insertFaultingInstr() 719 if (NumDefs != 0) { in insertFaultingInstr() 721 assert(NumDefs == 1 && "expected exactly one def!"); in insertFaultingInstr()
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| H A D | FixupStatepointCallerSaved.cpp | 482 unsigned NumDefs = MI.getNumDefs(); in rewriteStatepoint() local 483 for (unsigned I = 0; I < NumDefs; ++I) { in rewriteStatepoint() 515 for (unsigned I = NumDefs; I < MI.getNumOperands(); ++I) { in rewriteStatepoint() 530 assert(OldDef < NumDefs); in rewriteStatepoint()
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| H A D | MachineCSE.cpp | 610 unsigned NumDefs = MI->getNumDefs(); in ProcessBlockCSE() local 612 for (unsigned i = 0, e = MI->getNumOperands(); NumDefs && i != e; ++i) { in ProcessBlockCSE() 630 --NumDefs; in ProcessBlockCSE() 655 --NumDefs; in ProcessBlockCSE()
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| H A D | MachineInstr.cpp | 746 unsigned NumDefs = MCID->getNumDefs(); in getNumExplicitDefs() local 748 return NumDefs; in getNumExplicitDefs() 750 for (unsigned I = NumDefs, E = getNumOperands(); I != E; ++I) { in getNumExplicitDefs() 754 ++NumDefs; in getNumExplicitDefs() 756 return NumDefs; in getNumExplicitDefs() 1154 unsigned NumDefs = getNumDefs(); in findTiedOperandIdx() local 1155 for (unsigned CurDefIdx = 0; CurDefIdx < NumDefs; ++CurDefIdx) { in findTiedOperandIdx()
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| H A D | TargetInstrInfo.cpp | 499 unsigned NumDefs = 0; in foldPatchpoint() local 501 std::tie(NumDefs, StartIdx) = TII.getPatchpointUnfoldableRange(MI); in foldPatchpoint() 508 if (Op < NumDefs) { in foldPatchpoint() 550 assert(TiedTo < NumDefs && "Bad tied operand"); in foldPatchpoint()
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| H A D | PeepholeOptimizer.cpp | 871 unsigned NumDefs; ///< Number of defs in the bitcast. member in __anonbcd030b40211::UncoalescableRewriter 875 NumDefs = MI.getDesc().getNumDefs(); in UncoalescableRewriter() 885 if (CurrentSrcIdx == NumDefs) in getNextRewritableSource() 890 if (CurrentSrcIdx == NumDefs) in getNextRewritableSource()
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| H A D | MachineLICM.cpp | 1071 unsigned NumDefs = MI.getDesc().getNumDefs(); in IsCheapInstruction() local 1072 for (unsigned i = 0, e = MI.getNumOperands(); NumDefs && i != e; ++i) { in IsCheapInstruction() 1076 --NumDefs; in IsCheapInstruction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 199 unsigned char NumDefs; // Num of args that are definitions variable 243 unsigned getNumDefs() const { return NumDefs; } in getNumDefs()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/MC/ |
| H A D | MCInstrDesc.cpp | 44 for (int i = 0, e = NumDefs; i != e; ++i) in hasDefOfPhysReg()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BTFDebug.cpp | 1067 unsigned NumDefs = 0; in beginInstruction() local 1068 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef(); in beginInstruction() 1069 ++NumDefs) in beginInstruction() 1073 const char *AsmStr = MI->getOperand(NumDefs).getSymbolName(); in beginInstruction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 419 unsigned NumDefs = Desc.getNumDefs(); in clearsSuperRegisters() local 421 assert(Mask.getBitWidth() == NumDefs + NumImplicitDefs && in clearsSuperRegisters() 452 for (unsigned I = 0, E = NumDefs; I < E; ++I) { in clearsSuperRegisters() 461 Mask.setBit(NumDefs + I); in clearsSuperRegisters()
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| H A D | X86BaseInfo.h | 1047 unsigned NumDefs = Desc.getNumDefs(); in getOperandBias() local 1049 switch (NumDefs) { in getOperandBias()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitTracker.cpp | 190 unsigned NumDefs = 0; in evaluate() local 196 NumDefs++; in evaluate() 200 if (NumDefs == 0) in evaluate()
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| H A D | HexagonInstrInfo.cpp | 4493 unsigned NumDefs = 0; in getSize() local 4494 for (; MI.getOperand(NumDefs).isReg() && MI.getOperand(NumDefs).isDef(); in getSize() 4495 ++NumDefs) in getSize() 4496 assert(NumDefs != MI.getNumOperands()-2 && "No asm string?"); in getSize() 4498 assert(MI.getOperand(NumDefs).isSymbol() && "No asm string?"); in getSize() 4500 const char *AsmStr = MI.getOperand(NumDefs).getSymbolName(); in getSize()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 1290 unsigned NumDefs = I.getNumOperands() - 1; in selectUnmergeValues() local 1291 Register SrcReg = I.getOperand(NumDefs).getReg(); in selectUnmergeValues() 1294 for (unsigned Idx = 0; Idx < NumDefs; ++Idx) { in selectUnmergeValues()
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