Searched refs:NextReg (Results 1 – 6 of 6) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1338 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1343 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1349 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1352 NextReg += 4; in emitAlignedDPRCS2Spills()
1358 unsigned R4BaseReg = NextReg; in emitAlignedDPRCS2Spills()
1362 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1368 .addReg(NextReg) in emitAlignedDPRCS2Spills()
1371 NextReg += 4; in emitAlignedDPRCS2Spills()
1377 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1385 NextReg += 2; in emitAlignedDPRCS2Spills()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 1111 unsigned NextReg = SrcReg; in getSrcVReg() local
1114 NextReg = getIncomingRegForBlock(Inst, BB1); in getSrcVReg()
1119 NextReg = Inst->getOperand(1).getReg(); in getSrcVReg()
1120 if (NextReg == SrcReg || !Register::isVirtualRegister(NextReg)) in getSrcVReg()
1122 SrcReg = NextReg; in getSrcVReg()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 2298 unsigned NextReg = CSI[i + RegInc].getReg(); in computeCalleeSaveRegisterPairs() local
2302 if (AArch64::GPR64RegClass.contains(NextReg) && in computeCalleeSaveRegisterPairs()
2303 !invalidateRegisterPairing(RPI.Reg1, NextReg, IsWindows, in computeCalleeSaveRegisterPairs()
2305 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
2308 if (AArch64::FPR64RegClass.contains(NextReg) && in computeCalleeSaveRegisterPairs()
2309 !invalidateWindowsRegisterPairing(RPI.Reg1, NextReg, NeedsWinCFI, in computeCalleeSaveRegisterPairs()
2311 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
2314 if (AArch64::FPR128RegClass.contains(NextReg)) in computeCalleeSaveRegisterPairs()
2315 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1256 Register NextReg = MI->getOperand(1).getReg(); in getTestBitReg() local
1258 if (!NextReg.isValid() || !MRI.hasOneNonDBGUse(NextReg)) in getTestBitReg()
1262 Reg = NextReg; in getTestBitReg()
1306 Register NextReg; in getTestBitReg() local
1314 NextReg = TestReg; in getTestBitReg()
1320 NextReg = TestReg; in getTestBitReg()
1327 NextReg = TestReg; in getTestBitReg()
1335 NextReg = TestReg; in getTestBitReg()
1350 NextReg = TestReg; in getTestBitReg()
1355 if (!NextReg.isValid()) in getTestBitReg()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2584 unsigned NextReg, NextRegNum, NextRegWidth; in ParseRegList() local
2587 if (!ParseAMDGPURegister(NextRegKind, NextReg, in ParseRegList()
2600 if (!AddNextRegisterToList(Reg, RegWidth, RegKind, NextReg, Loc)) in ParseRegList()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 6141 int NextReg = nextReg(((MipsOperand &)*Operands[1]).getGPR32Reg()); in ConvertXWPOperands() local
6142 Inst.addOperand(MCOperand::createReg(NextReg)); in ConvertXWPOperands()
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