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Searched refs:MaskOp (Results 1 – 8 of 8) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
H A DEarlyCSE.cpp897 auto MaskOp = [](const IntrinsicInst *II) { in isNonTargetIntrinsicMatch() local
923 if (MaskOp(Earlier) == MaskOp(Later) && ThruOp(Earlier) == ThruOp(Later)) in isNonTargetIntrinsicMatch()
927 return IsSubmask(MaskOp(Later), MaskOp(Earlier)); in isNonTargetIntrinsicMatch()
934 if (!IsSubmask(MaskOp(Later), MaskOp(Earlier))) in isNonTargetIntrinsicMatch()
942 return IsSubmask(MaskOp(Later), MaskOp(Earlier)); in isNonTargetIntrinsicMatch()
949 return IsSubmask(MaskOp(Earlier), MaskOp(Later)); in isNonTargetIntrinsicMatch()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetTransformInfo.cpp1101 Value *MaskOp = II->getArgOperand(1); in rewriteIntrinsicWithAddressSpace() local
1102 Type *MaskTy = MaskOp->getType(); in rewriteIntrinsicWithAddressSpace()
1117 KnownBits Known = computeKnownBits(MaskOp, DL, 0, nullptr, II); in rewriteIntrinsicWithAddressSpace()
1127 MaskOp = B.CreateTrunc(MaskOp, MaskTy); in rewriteIntrinsicWithAddressSpace()
1131 {NewV, MaskOp}); in rewriteIntrinsicWithAddressSpace()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DThumb2InstrInfo.cpp789 MachineOperand &MaskOp = Instr.getOperand(0); in recomputeVPTBlockMask() local
790 assert(MaskOp.isImm() && "Operand 0 is not the block mask of the VPT/VPST?!"); in recomputeVPTBlockMask()
813 MaskOp.setImm((int64_t)(BlockMask)); in recomputeVPTBlockMask()
H A DARMISelLowering.cpp13504 SDValue MaskOp = N0.getOperand(1); in PerformORCombineToBFI() local
13505 ConstantSDNode *MaskC = dyn_cast<ConstantSDNode>(MaskOp); in PerformORCombineToBFI()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp2028 const MachineOperand &MaskOp = MI->getOperand(MaskIdx); in addConstantComments() local
2029 if (auto *C = getConstantFromPool(*MI, MaskOp)) { in addConstantComments()
2106 const MachineOperand &MaskOp = MI->getOperand(MaskIdx); in addConstantComments() local
2107 if (auto *C = getConstantFromPool(*MI, MaskOp)) { in addConstantComments()
2135 const MachineOperand &MaskOp = MI->getOperand(3 + X86::AddrDisp); in addConstantComments() local
2136 if (auto *C = getConstantFromPool(*MI, MaskOp)) { in addConstantComments()
2150 const MachineOperand &MaskOp = MI->getOperand(3 + X86::AddrDisp); in addConstantComments() local
2151 if (auto *C = getConstantFromPool(*MI, MaskOp)) { in addConstantComments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/
H A DX86InstComments.cpp269 unsigned MaskOp = Desc.getNumDefs(); in printMasking() local
271 if (Desc.getOperandConstraint(MaskOp, MCOI::TIED_TO) != -1) in printMasking()
272 ++MaskOp; in printMasking()
274 const char *MaskRegName = getRegName(MI->getOperand(MaskOp).getReg()); in printMasking()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DMachineVerifier.cpp1423 const MachineOperand &MaskOp = MI->getOperand(3); in verifyPreISelGenericInstruction() local
1424 if (!MaskOp.isShuffleMask()) { in verifyPreISelGenericInstruction()
1444 ArrayRef<int> MaskIdxes = MaskOp.getShuffleMask(); in verifyPreISelGenericInstruction()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp5425 SDValue MaskOp = N->getOperand(1); in BackwardsPropagateMask() local
5433 SDValue(FixupNode, 0), MaskOp); in BackwardsPropagateMask()
5436 DAG.UpdateNodeOperands(And.getNode(), SDValue(FixupNode, 0), MaskOp); in BackwardsPropagateMask()
5448 Op1, MaskOp); in BackwardsPropagateMask()
5457 SDValue(Load, 0), MaskOp); in BackwardsPropagateMask()
5461 DAG.UpdateNodeOperands(And.getNode(), SDValue(Load, 0), MaskOp), 0); in BackwardsPropagateMask()