| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.h | 26 class MachineIRBuilder; variable 43 MachineIRBuilder &B) const; 46 MachineIRBuilder &B) const; 48 MachineIRBuilder &B) const; 50 MachineIRBuilder &B) const; 52 MachineIRBuilder &B) const; 54 MachineIRBuilder &B) const; 56 MachineIRBuilder &B, bool Signed) const; 58 MachineIRBuilder &B, bool Signed) const; 61 MachineIRBuilder &B) const; [all …]
|
| H A D | AMDGPUCallLowering.h | 27 void lowerParameterPtr(Register DstReg, MachineIRBuilder &B, Type *ParamTy, 30 void lowerParameter(MachineIRBuilder &B, Type *ParamTy, uint64_t Offset, 37 bool lowerReturnVal(MachineIRBuilder &B, const Value *Val, 43 bool lowerReturn(MachineIRBuilder &B, const Value *Val, 47 bool lowerFormalArgumentsKernel(MachineIRBuilder &B, const Function &F, 50 bool lowerFormalArguments(MachineIRBuilder &B, const Function &F, 54 bool passSpecialInputs(MachineIRBuilder &MIRBuilder, 70 isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder, 76 MachineIRBuilder &MIRBuilder, MachineInstrBuilder &CallInst, 80 bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, [all …]
|
| H A D | AMDGPURegisterBankInfo.h | 28 class MachineIRBuilder; variable 48 bool buildVCopy(MachineIRBuilder &B, Register DstReg, Register SrcReg) const; 57 MachineIRBuilder &B, 62 bool executeInWaterfallLoop(MachineIRBuilder &B, 87 Register handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI, 91 splitBufferOffsets(MachineIRBuilder &B, Register Offset) const; 93 MachineInstr *selectStoreIntrinsic(MachineIRBuilder &B, 125 void split64BitValueForMapping(MachineIRBuilder &B,
|
| H A D | AMDGPULegalizerInfo.cpp | 1660 MachineIRBuilder &B = Helper.MIRBuilder; in legalizeCustom() 1734 MachineIRBuilder &B) const { in getSegmentAperture() 1792 MachineIRBuilder &B) const { in legalizeAddrSpaceCast() 1888 MachineIRBuilder &B) const { in legalizeFrint() 1914 MachineIRBuilder &B) const { in legalizeFceil() 1942 MachineIRBuilder &B) const { in legalizeFrem() 1958 MachineIRBuilder &B) { in extractF64Exponent() 1976 MachineIRBuilder &B) const { in legalizeIntrinsicTrunc() 2021 MachineIRBuilder &B, bool Signed) const { in legalizeITOFP() 2054 MachineIRBuilder &B, bool Signed) const { in legalizeFPTOI() [all …]
|
| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | IRTranslator.h | 208 MachineIRBuilder &MIRBuilder); 212 bool translateBitCast(const User &U, MachineIRBuilder &MIRBuilder); 215 bool translateLoad(const User &U, MachineIRBuilder &MIRBuilder); 218 bool translateStore(const User &U, MachineIRBuilder &MIRBuilder); 221 bool translateMemFunc(const CallInst &CI, MachineIRBuilder &MIRBuilder, 224 void getStackGuard(Register DstReg, MachineIRBuilder &MIRBuilder); 227 MachineIRBuilder &MIRBuilder); 229 MachineIRBuilder &MIRBuilder); 240 MachineIRBuilder &MIRBuilder); 243 MachineIRBuilder &MIRBuilder); [all …]
|
| H A D | CallLowering.h | 38 class MachineIRBuilder; variable 217 MachineIRBuilder &MIRBuilder; 221 ValueHandler(bool IsIncoming, MachineIRBuilder &MIRBuilder, in ValueHandler() 302 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in IncomingValueHandler() 317 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in OutgoingValueHandler() 361 MachineIRBuilder &MIRBuilder) const; 385 MachineIRBuilder &MIRBuilder, 395 MachineIRBuilder &MIRBuilder, 435 void insertSRetLoads(MachineIRBuilder &MIRBuilder, Type *RetTy, 441 void insertSRetStores(MachineIRBuilder &MIRBuilder, Type *RetTy, [all …]
|
| H A D | CSEMIRBuilder.h | 32 class CSEMIRBuilder : public MachineIRBuilder { 92 using MachineIRBuilder::MachineIRBuilder; 98 using MachineIRBuilder::buildConstant; 104 using MachineIRBuilder::buildFConstant;
|
| H A D | InlineAsmLowering.h | 22 class MachineIRBuilder; variable 38 bool lowerInlineAsm(MachineIRBuilder &MIRBuilder, const CallBase &CB, 49 MachineIRBuilder &MIRBuilder) const;
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 26 void MachineIRBuilder::setMF(MachineFunction &MF) { in setMF() 40 MachineInstrBuilder MachineIRBuilder::buildInstrNoInsert(unsigned Opcode) { in buildInstrNoInsert() 45 MachineInstrBuilder MachineIRBuilder::insertInstr(MachineInstrBuilder MIB) { in insertInstr() 52 MachineIRBuilder::buildDirectDbgValue(Register Reg, const MDNode *Variable, in buildDirectDbgValue() 65 MachineIRBuilder::buildIndirectDbgValue(Register Reg, const MDNode *Variable, in buildIndirectDbgValue() 77 MachineInstrBuilder MachineIRBuilder::buildFIDbgValue(int FI, in buildFIDbgValue() 92 MachineInstrBuilder MachineIRBuilder::buildConstDbgValue(const Constant &C, in buildConstDbgValue() 117 MachineInstrBuilder MachineIRBuilder::buildDbgLabel(const MDNode *Label) { in buildDbgLabel() 126 MachineInstrBuilder MachineIRBuilder::buildDynStackAlloc(const DstOp &Res, in buildDynStackAlloc() 137 MachineInstrBuilder MachineIRBuilder::buildFrameIndex(const DstOp &Res, in buildFrameIndex() [all …]
|
| H A D | CSEMIRBuilder.cpp | 209 return MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr() 213 auto MIB = MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr() 230 MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr() 238 return MachineIRBuilder::buildConstant(Res, Val); in buildConstant() 257 MachineInstrBuilder NewMIB = MachineIRBuilder::buildConstant(Res, Val); in buildConstant() 265 return MachineIRBuilder::buildFConstant(Res, Val); in buildFConstant() 283 MachineInstrBuilder NewMIB = MachineIRBuilder::buildFConstant(Res, Val); in buildFConstant()
|
| H A D | IRTranslator.cpp | 281 MachineIRBuilder &MIRBuilder) { in translateBinaryOp() 300 MachineIRBuilder &MIRBuilder) { in translateUnaryOp() 312 bool IRTranslator::translateFNeg(const User &U, MachineIRBuilder &MIRBuilder) { in translateFNeg() 317 MachineIRBuilder &MIRBuilder) { in translateCompare() 342 bool IRTranslator::translateRet(const User &U, MachineIRBuilder &MIRBuilder) { in translateRet() 558 bool IRTranslator::translateBr(const User &U, MachineIRBuilder &MIRBuilder) { in translateBr() 673 bool IRTranslator::translateSwitch(const User &U, MachineIRBuilder &MIB) { in translateSwitch() 750 MachineIRBuilder MIB(*MBB->getParent()); in emitJumpTable() 764 MachineIRBuilder MIB(*HeaderBB->getParent()); in emitJumpTableHeader() 807 MachineIRBuilder &MIB) { in emitSwitchCase() [all …]
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.h | 28 class MachineIRBuilder; variable 36 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 42 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 46 bool lowerCall(MachineIRBuilder &MIRBuilder, 51 isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder, 61 using RegHandler = std::function<void(MachineIRBuilder &, Type *, unsigned, 65 std::function<void(MachineIRBuilder &, int, CCValAssign &)>; 67 bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info,
|
| H A D | AArch64LegalizerInfo.h | 39 MachineIRBuilder &MIRBuilder) const; 41 MachineIRBuilder &MIRBuilder, 44 MachineIRBuilder &MIRBuilder, 48 MachineIRBuilder &MIRBuilder,
|
| H A D | AArch64PostLegalizerCombiner.cpp | 94 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyExtractVecEltPairwiseAdd() 123 std::function<void(MachineIRBuilder &B, Register DstReg)> &ApplyFn) { in matchAArch64MulConstCombine() 210 ApplyFn = [=](MachineIRBuilder &B, Register DstReg) { in matchAArch64MulConstCombine() 235 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyAArch64MulConstCombine() 236 std::function<void(MachineIRBuilder &B, Register DstReg)> &ApplyFn) { in applyAArch64MulConstCombine() 246 std::function<void(MachineIRBuilder &)> &MatchInfo) { in matchBitfieldExtractFromSExtInReg() 263 MatchInfo = [=](MachineIRBuilder &B) { in matchBitfieldExtractFromSExtInReg() 298 MachineIRBuilder &B) const override; 303 MachineIRBuilder &B) const { in combine()
|
| H A D | AArch64PostLegalizerLowering.cpp | 398 MachineIRBuilder MIRBuilder(MI); in applyShuffleVectorPseudo() 408 MachineIRBuilder MIRBuilder(MI); in applyEXT() 457 MachineIRBuilder &Builder, in applyINS() 505 MachineIRBuilder MIB(MI); in applyVAshrLshrImm() 631 MachineIRBuilder &MIB, GISelChangeObserver &Observer) { in applyAdjustICmpImmAndPred() 697 MachineIRBuilder &B, std::pair<unsigned, int> &MatchInfo) { in applyDupLane() 736 MachineIRBuilder &B) { in applyBuildVectorToDup() 855 static std::function<Register(MachineIRBuilder &)> 865 return [LHS, RHS, IsZero, DstTy](MachineIRBuilder &MIB) { in getVectorFCMP() 872 return [LHS, RHS, IsZero, DstTy](MachineIRBuilder &MIB) { in getVectorFCMP() [all …]
|
| H A D | AArch64PreLegalizerCombiner.cpp | 55 MachineIRBuilder MIB(MI); in applyFConstantToConstant() 94 MachineIRBuilder &Builder, in applyICmpRedundantTrunc() 183 MachineIRBuilder &B, in applyFoldGlobalOffset() 257 MachineIRBuilder &B) const override; 262 MachineIRBuilder &B) const { in combine()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.h | 28 class MachineIRBuilder; variable 35 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 39 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 43 bool lowerCall(MachineIRBuilder &MIRBuilder, 47 bool lowerReturnVal(MachineIRBuilder &MIRBuilder, const Value *Val,
|
| H A D | ARMCallLowering.cpp | 89 ARMOutgoingValueHandler(MachineIRBuilder &MIRBuilder, in ARMOutgoingValueHandler() 178 bool ARMCallLowering::lowerReturnVal(MachineIRBuilder &MIRBuilder, in lowerReturnVal() 209 bool ARMCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() 230 ARMIncomingValueHandler(MachineIRBuilder &MIRBuilder, in ARMIncomingValueHandler() 350 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler() 361 bool ARMCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder, in lowerFormalArguments() 422 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in CallReturnHandler() 452 bool ARMCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const { in lowerCall()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.h | 29 MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in MipsHandler() 43 MachineIRBuilder &MIRBuilder; 66 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 70 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 74 bool lowerCall(MachineIRBuilder &MIRBuilder,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVCallLowering.h | 30 bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val, 34 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 38 bool lowerCall(MachineIRBuilder &MIRBuilder,
|
| H A D | RISCVCallLowering.cpp | 24 bool RISCVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() 37 bool RISCVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder, in lowerFormalArguments() 48 bool RISCVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, in lowerCall()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCCallLowering.h | 29 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 32 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 35 bool lowerCall(MachineIRBuilder &MIRBuilder,
|
| H A D | PPCCallLowering.cpp | 26 bool PPCCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() 39 bool PPCCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder, in lowerFormalArguments() 50 bool PPCCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, in lowerCall()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.h | 31 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 35 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 39 bool lowerCall(MachineIRBuilder &MIRBuilder,
|
| H A D | X86CallLowering.cpp | 85 X86OutgoingValueHandler(MachineIRBuilder &MIRBuilder, in X86OutgoingValueHandler() 133 bool X86CallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() 167 X86IncomingValueHandler(MachineIRBuilder &MIRBuilder, in X86IncomingValueHandler() 214 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler() 224 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in CallReturnHandler() 238 bool X86CallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder, in lowerFormalArguments() 287 bool X86CallLowering::lowerCall(MachineIRBuilder &MIRBuilder, in lowerCall()
|