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Searched refs:MI0 (Results 1 – 8 of 8) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64CollectLOH.cpp284 const MachineInstr *MI0; ///< First instruction involved in the LOH. member
305 Info.MI0 = &MI; in handleUse()
311 Info.MI0 = &MI; in handleUse()
316 Info.MI0 = &MI; in handleUse()
322 Info.MI0 = &MI; in handleUse()
402 const MachineInstr *AddMI = Info.MI0; in handleADRP()
409 << '\t' << MI << '\t' << *Info.MI0); in handleADRP()
410 AFI.addLOHDirective(MCLOH_AdrpAdd, {&MI, Info.MI0}); in handleADRP()
415 if (supportLoadFromLiteral(*Info.MI0)) { in handleADRP()
417 << '\t' << MI << '\t' << *Info.MI0); in handleADRP()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
H A DAVRExpandPseudoInsts.cpp1426 auto MI0 = in expand() local
1432 MI0->getOperand(3).setIsDead(); in expand()
1514 auto MI0 = in expand() local
1520 MI0->getOperand(3).setIsDead(); in expand()
1586 auto MI0 = in expand() local
1592 MI0->getOperand(3).setIsDead(); in expand()
1674 auto MI0 = in expand() local
1680 MI0->getOperand(3).setIsDead(); in expand()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp1830 bool ARMBaseInstrInfo::produceSameValue(const MachineInstr &MI0, in produceSameValue() argument
1833 unsigned Opcode = MI0.getOpcode(); in produceSameValue()
1846 if (MI0.getNumOperands() != MI1.getNumOperands()) in produceSameValue()
1849 const MachineOperand &MO0 = MI0.getOperand(1); in produceSameValue()
1863 const MachineFunction *MF = MI0.getParent()->getParent(); in produceSameValue()
1884 if (MI0.getNumOperands() != MI1.getNumOperands()) in produceSameValue()
1887 Register Addr0 = MI0.getOperand(1).getReg(); in produceSameValue()
1903 for (unsigned i = 3, e = MI0.getNumOperands(); i != e; ++i) { in produceSameValue()
1905 const MachineOperand &MO0 = MI0.getOperand(i); in produceSameValue()
1913 return MI0.isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); in produceSameValue()
H A DARMBaseInstrInfo.h239 bool produceSameValue(const MachineInstr &MI0, const MachineInstr &MI1,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetInstrInfo.cpp429 bool TargetInstrInfo::produceSameValue(const MachineInstr &MI0, in produceSameValue() argument
432 return MI0.isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); in produceSameValue()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h556 virtual bool produceSameValue(const MachineInstr &MI0,
/netbsd-src/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.mi/
H A DChangeLog-1999-2003299 MI0 was the never enabled MI interface included in GDB 5.0.
/netbsd-src/external/gpl3/gdb/dist/gdb/testsuite/gdb.mi/
H A DChangeLog-1999-2003299 MI0 was the never enabled MI interface included in GDB 5.0.