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Searched refs:Late (Results 1 – 23 of 23) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/libcxx/
H A DTODO.TXT65 * INCOMPLETE - Late 36: permissions() error_code overload should be noexcept
66 * INCOMPLETE - Late 37: permissions() actions should be separate parameter
67 * INCOMPLETE - Late 42: resize_file() Postcondition missing argument
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonLoopIdiomRecognition.cpp600 ValueSeq &Late);
601 bool classifyInst(Instruction *UseI, ValueSeq &Early, ValueSeq &Late);
1166 ValueSeq &Cycle, ValueSeq &Early, ValueSeq &Late) { in classifyCycle() argument
1184 ValueSeq &First = !IsE ? Early : Late; in classifyCycle()
1188 ValueSeq &Second = IsE ? Early : Late; in classifyCycle()
1202 ValueSeq &Early, ValueSeq &Late) { in classifyInst() argument
1209 if (Late.count(TV) || Late.count(FV)) in classifyInst()
1212 } else if (Late.count(TV) || Late.count(FV)) { in classifyInst()
1215 Late.insert(UseI); in classifyInst()
1229 else if (Late.count(&*I)) in classifyInst()
[all …]
H A DHexagonInstrFormats.td93 let TSFlags{13} = isPredicateLate; // Late predicate producer insn.
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DSplitKit.h453 bool Late, unsigned RegIdx);
457 unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex Def);
H A DSplitKit.cpp524 unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex Def) { in buildSingleSubRegCopy() argument
535 Def = Indexes.insertMachineInstrInMaps(*CopyMI, Late).getRegSlot(); in buildSingleSubRegCopy()
550 MachineBasicBlock::iterator InsertBefore, bool Late, unsigned RegIdx) { in buildCopy() argument
557 return Indexes.insertMachineInstrInMaps(*CopyMI, Late).getRegSlot(); in buildCopy()
579 DestLI, Late, Def); in buildCopy()
595 bool Late = RegIdx != 0; in defFromParent() local
608 Def = Edit->rematerializeAt(MBB, I, Reg, RM, TRI, Late); in defFromParent()
629 Def = Indexes.insertMachineInstrInMaps(*ImplicitDef, Late).getRegSlot(); in defFromParent()
632 Def = buildCopy(Edit->getReg(), Reg, LaneMask, MBB, I, Late, RegIdx); in defFromParent()
H A DLiveRangeEdit.cpp169 bool Late) { in rematerializeAt() argument
177 return LIS.getSlotIndexes()->insertMachineInstrInMaps(*MI, Late).getRegSlot(); in rematerializeAt()
/netbsd-src/external/bsd/unbound/dist/doc/
H A DCREDITS6 Late in 2006, NLnet Labs joined the effort, writing an implementation in C
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DSlotIndexes.h535 SlotIndex insertMachineInstrInMaps(MachineInstr &MI, bool Late = false) {
547 if (Late) {
H A DLiveRangeEdit.h223 bool Late = false);
/netbsd-src/external/gpl3/gcc/dist/gcc/config/arm/
H A Dcortex-r4.md267 ;; as a Late Reg, there are two fewer cycles of latency. Such consumer
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/arm/
H A Dcortex-r4.md267 ;; as a Late Reg, there are two fewer cycles of latency. Such consumer
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMScheduleR52.td60 // ALU - Write occurs in Late EX2 (independent of whether shift was required)
78 // Branches - LR written in Late EX2
/netbsd-src/external/gpl3/gcc/dist/gcc/doc/
H A Dpasses.texi202 * Late IPA passes::
417 @node Late IPA passes
418 @subsection Late IPA passes
421 Late IPA passes are simple IPA passes executed after
H A Dlto.texi354 and late inter-procedural passes (@pxref{Late IPA passes}).
H A Dgccint.info7793 * Late IPA passes::
7890 File: gccint.info, Node: Regular IPA passes, Next: Late IPA passes, Prev: Small IPA passes, Up:…
8007 File: gccint.info, Node: Late IPA passes, Prev: Regular IPA passes, Up: IPA passes
8009 9.4.3 Late IPA passes
8012 Late IPA passes are simple IPA passes executed after the regular passes.
46305 inter-procedural passes (*note Late IPA passes::). A small or late IPA
55875 * late IPA passes: Late IPA passes. (line 6)
58367 Node: Late IPA passes344863
/netbsd-src/external/gpl3/gcc.old/dist/gcc/doc/
H A Dpasses.texi202 * Late IPA passes::
424 @node Late IPA passes
425 @subsection Late IPA passes
428 Late IPA passes are simple IPA passes executed after
H A Dlto.texi355 and late inter-procedural passes (@pxref{Late IPA passes}).
H A Dgccint.info7429 * Late IPA passes::
7526 File: gccint.info, Node: Regular IPA passes, Next: Late IPA passes, Prev: Small IPA passes, Up:…
7648 File: gccint.info, Node: Late IPA passes, Prev: Regular IPA passes, Up: IPA passes
7650 9.4.3 Late IPA passes
7653 Late IPA passes are simple IPA passes executed after the regular passes.
44683 inter-procedural passes (*note Late IPA passes::). A small or late IPA
54133 * late IPA passes: Late IPA passes. (line 6)
56533 Node: Late IPA passes331768
/netbsd-src/external/apache2/llvm/dist/llvm/docs/
H A DCodeGenerator.rst145 6. `Late Machine Code Optimizations`_ --- Optimizations that operate on "final"
1550 Late Machine Code Optimizations
H A DWritingAnLLVMBackend.rst52 Insertion, Late Machine Code Optimizations, and Code Emission.
/netbsd-src/external/gpl3/gdb.old/dist/gdb/
H A DChangeLog-1991591 Late-model BSD 'make's don't cope with them.
/netbsd-src/external/gpl3/gdb/dist/gdb/
H A DChangeLog-1991591 Late-model BSD 'make's don't cope with them.
/netbsd-src/games/fortune/datfiles/
H A Dfortunes215030 Late at night you will find them,
20020 -- David Bromberg, "How Late'll You Play 'Til?"
21239 I Knew That You'd Committed a Sin When You Came Home Late With
48324 Too Late