| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMInstrNEON.td | 2489 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2492 [(set DPR:$Vd, (ResTy (IntOp (OpTy DPR:$Vm))))]>;
2496 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2499 [(set QPR:$Vd, (ResTy (IntOp (OpTy QPR:$Vm))))]>;
2504 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2507 [(set DPR:$Vd, (ResTy (IntOp (OpTy DPR:$Vm))))]>;
2511 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2514 [(set QPR:$Vd, (ResTy (IntOp (OpTy QPR:$Vm))))]>;
2519 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2522 [(set QPR:$Vd, (ResTy (IntOp (OpTy QPR:$Vm))))]>;
[all …]
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| H A D | ARMISelLowering.cpp | 16557 unsigned IntOp = cast<ConstantSDNode>(N.getOperand(1))->getZExtValue(); in SearchLoopIntrinsic() local
16558 if (IntOp != Intrinsic::test_start_loop_iterations && in SearchLoopIntrinsic()
16559 IntOp != Intrinsic::loop_decrement_reg) in SearchLoopIntrinsic()
16635 unsigned IntOp = cast<ConstantSDNode>(Int->getOperand(1))->getZExtValue(); in PerformHWLoopCombine() local
16648 if (IntOp == Intrinsic::test_start_loop_iterations) { in PerformHWLoopCombine()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/AsmParser/ |
| H A D | WebAssemblyAsmParser.cpp | 55 struct IntOp { struct
73 struct IntOp Int;
81 WebAssemblyOperand(KindTy K, SMLoc Start, SMLoc End, IntOp I) in WebAssemblyOperand()
370 WebAssemblyOperand::IntOp{Val})); in parseSingleInteger()
441 WebAssemblyOperand::IntOp{-1})); in checkForP2AlignIfLoadStore()
451 WebAssemblyOperand::IntOp{static_cast<int64_t>(BT)})); in addBlockTypeOperand()
507 WebAssemblyOperand::IntOp{0}); in parseFunctionTableOperand()
650 WebAssemblyOperand::IntOp{static_cast<int64_t>(HeapType)})); in ParseInstruction()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXIntrinsics.td | 195 multiclass VOTE<NVPTXRegClass regclass, string mode, Intrinsic IntOp> {
198 [(set regclass:$dest, (IntOp Int1Regs:$pred))]>,
208 multiclass VOTE_SYNC<NVPTXRegClass regclass, string mode, Intrinsic IntOp> {
211 [(set regclass:$dest, (IntOp imm:$mask, Int1Regs:$pred))]>,
215 [(set regclass:$dest, (IntOp Int32Regs:$mask, Int1Regs:$pred))]>,
224 multiclass MATCH_ANY_SYNC<NVPTXRegClass regclass, string ptxtype, Intrinsic IntOp,
228 [(set regclass:$dest, (IntOp imm:$mask, imm:$value))]>,
232 [(set regclass:$dest, (IntOp Int32Regs:$mask, imm:$value))]>,
236 [(set regclass:$dest, (IntOp imm:$mask, regclass:$value))]>,
240 [(set regclass:$dest, (IntOp Int32Regs:$mask, regclass:$value))]>,
[all …]
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| /netbsd-src/external/bsd/unbound/dist/winrc/ |
| H A D | setup.nsi | 111 IntOp $R0 $R0 & ${SF_SELECTED}
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 1159 const SCEV *IntOp = SCEVPtrToIntSinkingRewriter::rewrite(Op, *this); in getLosslessPtrToIntExpr() local
1160 assert(IntOp->getType()->isIntegerTy() && in getLosslessPtrToIntExpr()
1163 return IntOp; in getLosslessPtrToIntExpr()
1169 const SCEV *IntOp = getLosslessPtrToIntExpr(Op); in getPtrToIntExpr() local
1170 if (isa<SCEVCouldNotCompute>(IntOp)) in getPtrToIntExpr()
1171 return IntOp; in getPtrToIntExpr()
1173 return getTruncateOrZeroExtend(IntOp, Ty); in getPtrToIntExpr()
6838 const SCEV *IntOp = getPtrToIntExpr(Op, DstIntTy); in createSCEV() local
6839 if (isa<SCEVCouldNotCompute>(IntOp)) in createSCEV()
6841 return IntOp; in createSCEV()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrFormats.td | 6331 Intrinsic IntOp> {
6335 [(set (v8i8 V64:$Rd), (IntOp (v8i16 V128:$Rn), (v8i16 V128:$Rm)))]>;
6343 [(set (v4i16 V64:$Rd), (IntOp (v4i32 V128:$Rn), (v4i32 V128:$Rm)))]>;
6351 [(set (v2i32 V64:$Rd), (IntOp (v2i64 V128:$Rn), (v2i64 V128:$Rm)))]>;
6360 def : Pat<(concat_vectors (v8i8 V64:$Rd), (IntOp (v8i16 V128:$Rn),
6365 def : Pat<(concat_vectors (v4i16 V64:$Rd), (IntOp (v4i32 V128:$Rn),
6370 def : Pat<(concat_vectors (v2i32 V64:$Rd), (IntOp (v2i64 V128:$Rn),
6378 Intrinsic IntOp> {
6382 [(set (v8i16 V128:$Rd), (IntOp (v8i8 V64:$Rn), (v8i8 V64:$Rm)))]>;
6395 def : Pat<(v8i16 (IntOp (v8i8 (extract_high_v16i8 V128:$Rn)),
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 47144 SDValue IntOp = DAG.getNode(IntOpcode, dl, IntVT, Op0, Op1); in lowerX86FPLogicOp() local
47145 return DAG.getBitcast(VT, IntOp); in lowerX86FPLogicOp()
|